commit 083f0de347a5ed079d1ade1b9c54c5cc88a2b1d7 parent 7412294a1a3e8c525a88e1d8628e51d366058a93 Author: mntmn <lukas@mntmn.com> Date: Tue, 9 Jul 2019 22:33:06 +0200 WIP: reform 2 motherboard: tweaks for CL-SOM Diffstat:
12 files changed, 3124 insertions(+), 2906 deletions(-)
diff --git a/reform2-motherboard/reform2-motherboard/reform2-audio.sch b/reform2-motherboard/reform2-motherboard/reform2-audio.sch @@ -6,8 +6,8 @@ $Descr A4 11693 8268 encoding utf-8 Sheet 9 9 Title "Reform 2 Audio" -Date "2019-07-03" -Rev "0.1" +Date "2019-07-09" +Rev "0.1.1" Comp "MNT Research GmbH" Comment1 "https://mntre.com" Comment2 "Engineer: Lukas F. Hartmann" diff --git a/reform2-motherboard/reform2-motherboard/reform2-display.sch b/reform2-motherboard/reform2-motherboard/reform2-display.sch @@ -6,8 +6,8 @@ $Descr A4 11693 8268 encoding utf-8 Sheet 5 9 Title "MNT Reform 2 Internal Display" -Date "2019-07-03" -Rev "0.1" +Date "2019-07-09" +Rev "0.1.1" Comp "MNT Research GmbH" Comment1 "https://mntre.com" Comment2 "Engineer: Lukas F. Hartmann" diff --git a/reform2-motherboard/reform2-motherboard/reform2-eth.sch b/reform2-motherboard/reform2-motherboard/reform2-eth.sch @@ -6,8 +6,8 @@ $Descr A4 11693 8268 encoding utf-8 Sheet 4 9 Title "MNT Reform 2 Ethernet" -Date "2019-07-03" -Rev "0.1" +Date "2019-07-09" +Rev "0.1.1" Comp "MNT Research GmbH" Comment1 "https://mntre.com" Comment2 "Engineer: Lukas F. Hartmann" @@ -225,9 +225,9 @@ Wire Wire Line 4150 4850 5050 4850 Wire Wire Line 4150 4850 4150 5450 -Text GLabel 5050 5050 0 60 Output ~ 0 -ETH0_LED_LINK -Text GLabel 5050 5650 0 60 Output ~ 0 +Text GLabel 5050 5650 0 60 Input ~ 0 +ETH0_LED_LINK1 +Text GLabel 5050 5050 0 60 Input ~ 0 ETH0_LED_RX Text GLabel 5050 2250 0 60 Output ~ 0 ETH0_D- @@ -245,4 +245,6 @@ Text GLabel 5050 4650 0 60 Output ~ 0 ETH0_A- Text GLabel 5050 4050 0 60 Output ~ 0 ETH0_A+ +Text GLabel 5050 5250 0 60 Input ~ 0 +ETH0_LED_LINK2 $EndSCHEMATC diff --git a/reform2-motherboard/reform2-motherboard/reform2-hdmi.sch b/reform2-motherboard/reform2-motherboard/reform2-hdmi.sch @@ -6,8 +6,8 @@ $Descr A4 11693 8268 encoding utf-8 Sheet 8 9 Title "MNT Reform 2 External Display" -Date "2019-07-03" -Rev "0.1" +Date "2019-07-09" +Rev "0.1.1" Comp "MNT Research GmbH" Comment1 "https://mntre.com" Comment2 "Engineer: Lukas F. Hartmann" diff --git a/reform2-motherboard/reform2-motherboard/reform2-motherboard-cache.lib b/reform2-motherboard/reform2-motherboard/reform2-motherboard-cache.lib @@ -1180,31 +1180,6 @@ X ~ 2 300 0 200 L 50 50 1 1 P ENDDRAW ENDDEF # -# Switch_SW_DIP_x02 -# -DEF Switch_SW_DIP_x02 SW 0 0 Y N 1 F N -F0 "SW" 0 250 50 H V C CNN -F1 "Switch_SW_DIP_x02" 0 -150 50 H V C CNN -F2 "" 0 0 50 H I C CNN -F3 "" 0 0 50 H I C CNN -$FPLIST - SW?DIP?x2* -$ENDFPLIST -DRAW -C -80 0 20 0 0 0 N -C -80 100 20 0 0 0 N -C 80 0 20 0 0 0 N -C 80 100 20 0 0 0 N -S -150 200 150 -100 0 1 10 f -P 2 0 0 0 -60 5 93 46 N -P 2 0 0 0 -60 105 93 146 N -X ~ 1 -300 100 200 R 50 50 1 1 P -X ~ 2 -300 0 200 R 50 50 1 1 P -X ~ 3 300 0 200 L 50 50 1 1 P -X ~ 4 300 100 200 L 50 50 1 1 P -ENDDRAW -ENDDEF -# # Switch_SW_Push # DEF Switch_SW_Push SW 0 40 N N 1 F N @@ -1742,25 +1717,7 @@ T 0 -777 2030 40 0 0 0 TRD4+ Normal 0 L B T 0 -776 1427 40 0 0 0 TRD4- Normal 0 L B T 0 -776 -1176 40 0 0 0 YEL+ Normal 0 L B T 0 -778 -1380 40 0 0 0 YEL- Normal 0 L B -P 2 0 0 10 -800 -2000 -800 -2100 N -P 2 0 0 10 -800 -1800 -800 -2000 N -P 2 0 0 10 -800 -1600 -800 -1800 N -P 2 0 0 10 -800 -1400 -800 -1600 N -P 2 0 0 10 -800 -1200 -800 -1400 N -P 2 0 0 10 -800 -1000 -800 -1200 N -P 2 0 0 10 -800 -700 -800 -1000 N -P 2 0 0 10 -800 -400 -800 -700 N -P 2 0 0 10 -800 -200 -800 -400 N -P 2 0 0 10 -800 100 -800 -200 N -P 2 0 0 10 -800 400 -800 100 N -P 2 0 0 10 -800 600 -800 400 N -P 2 0 0 10 -800 900 -800 600 N -P 2 0 0 10 -800 1200 -800 900 N -P 2 0 0 10 -800 1400 -800 1200 N -P 2 0 0 10 -800 1700 -800 1400 N -P 2 0 0 10 -800 2000 -800 1700 N -P 2 0 0 10 -800 2100 -800 2000 N -P 2 0 0 10 -800 2100 800 2100 N +S -800 2100 800 -2100 0 0 10 f P 2 0 0 10 -700 -2000 -625 -2000 N P 2 0 0 10 -700 -1800 -625 -1800 N P 2 0 0 10 -700 -1400 -625 -1400 N @@ -1940,10 +1897,7 @@ P 2 0 0 6 700 900 700 100 N P 2 0 0 6 700 1700 569 1700 N P 2 0 0 6 700 1700 700 900 N P 2 0 0 6 725 -1900 675 -2000 N -P 2 0 0 10 800 -2100 -800 -2100 N P 2 0 0 6 800 -1800 600 -1800 N -P 2 0 0 10 800 -1800 800 -2100 N -P 2 0 0 10 800 2100 800 -1800 N P 3 0 0 6 -270 -1620 -285 -1655 -305 -1635 F P 3 0 0 6 -265 -1935 -300 -1920 -280 -1900 F P 3 0 0 6 -265 -1665 -280 -1700 -300 -1680 F @@ -2180,124 +2134,123 @@ F3 "" -350 2700 50 H I C CNN DRAW S -850 4850 700 -5450 0 1 0 f X GND 1 -950 4750 100 R 50 50 1 1 W -X VSYS 10 800 4350 100 L 50 50 1 1 O +X VSYS 10 800 4350 100 L 50 50 1 1 W X QSPI_A_SS1_B 100 800 -150 100 L 50 50 1 1 O -X CSI_P1_DP2 101 -950 -150 100 R 50 50 1 1 O +X CSI_P1_DP2 101 -950 -250 100 R 50 50 1 1 O X QSPI_A_DQS 102 800 -250 100 L 50 50 1 1 O -X CSI_P1_DN2 103 -950 -250 100 R 50 50 1 1 O +X CSI_P1_DN2 103 -950 -350 100 R 50 50 1 1 O X QSPI_A_SCLK 104 800 -350 100 L 50 50 1 1 O -X GND 105 -950 -350 100 R 50 50 1 1 O +X GND 105 -950 -450 100 R 50 50 1 1 W X SAI1_RX_SYNC 106 800 -450 100 L 50 50 1 1 O -X CSI_P1_CKP 107 -950 -450 100 R 50 50 1 1 O +X CSI_P1_CKP 107 -950 -550 100 R 50 50 1 1 O X SAI1_MCLK 108 800 -550 100 L 50 50 1 1 O -X CSI_P1_CKN 109 -950 -550 100 R 50 50 1 1 O -X ECSPI1_MOSI 11 -950 4250 100 R 50 50 1 1 W +X CSI_P1_CKN 109 -950 -650 100 R 50 50 1 1 O +X ECSPI1_MOSI 11 -950 4250 100 R 50 50 1 1 O X SAI1_TX_SYNC 110 800 -650 100 L 50 50 1 1 O -X UART3_TX 111 -950 -650 100 R 50 50 1 1 O +X UART3_TX 111 -950 -750 100 R 50 50 1 1 O X SAI1_TX_BCLK 112 800 -750 100 L 50 50 1 1 O -X CSI_P1_DN3 113 -950 -750 100 R 50 50 1 1 O -X VSYS 114 800 -850 100 L 50 50 1 1 O -X CSI_P1_DP3 115 -950 -850 100 R 50 50 1 1 O +X CSI_P1_DN3 113 -950 -850 100 R 50 50 1 1 O +X VSYS 114 800 -850 100 L 50 50 1 1 W +X CSI_P1_DP3 115 -950 -950 100 R 50 50 1 1 O X SAI1_TX_DATA[0] 116 800 -950 100 L 50 50 1 1 O -X UART3_RX 117 -950 -950 100 R 50 50 1 1 O +X UART3_RX 117 -950 -1050 100 R 50 50 1 1 O X SAI1_TX_DATA[1] 118 800 -1050 100 L 50 50 1 1 O -X PCIE1_REF_CLKP 119 -950 -1050 100 R 50 50 1 1 O +X PCIE1_REF_CLKP 119 -950 -1150 100 R 50 50 1 1 O X ETH1_MDI1N 12 800 4250 100 L 50 50 1 1 O X SAI1_TX_DATA[2] 120 800 -1150 100 L 50 50 1 1 O -X PCIE1_REF_CLKN 121 -950 -1150 100 R 50 50 1 1 O +X PCIE1_REF_CLKN 121 -950 -1250 100 R 50 50 1 1 O X SAI1_TX_DATA[3] 122 800 -1250 100 L 50 50 1 1 O -X GND 123 -950 -1250 100 R 50 50 1 1 O +X GND 123 -950 -1350 100 R 50 50 1 1 W X GPIO3_IO[16] 124 800 -1350 100 L 50 50 1 1 O -X PCIE1_TXN_P 125 -950 -1350 100 R 50 50 1 1 O +X PCIE1_TXN_P 125 -950 -1450 100 R 50 50 1 1 O X SAI1_TX_DATA[3] 126 800 -1450 100 L 50 50 1 1 O -X PCIE1_TXN_N 127 -950 -1450 100 R 50 50 1 1 O +X PCIE1_TXN_N 127 -950 -1550 100 R 50 50 1 1 O X SAI1_TX_DATA[4] 128 800 -1550 100 L 50 50 1 1 O -X ENET1_MDC 129 -950 -1550 100 R 50 50 1 1 O -X ECSPI1_SCLK 13 -950 4150 100 R 50 50 1 1 W +X ENET1_MDC 129 -950 -1650 100 R 50 50 1 1 O +X ECSPI1_SCLK 13 -950 4150 100 R 50 50 1 1 O X SAI1_TX_DATA[7] 130 800 -1650 100 L 50 50 1 1 O -X PCIE1_RXN_P 131 -950 -1650 100 R 50 50 1 1 O -X VSYS 132 800 -1750 100 L 50 50 1 1 O -X PCIE1_RXN_N 133 -950 -1750 100 R 50 50 1 1 O +X PCIE1_RXN_P 131 -950 -1750 100 R 50 50 1 1 O +X VSYS 132 800 -1750 100 L 50 50 1 1 W +X PCIE1_RXN_N 133 -950 -1850 100 R 50 50 1 1 O X SAI1_RX_DATA[0] 134 800 -1850 100 L 50 50 1 1 O -X ENET1_MDIO 135 -950 -1850 100 R 50 50 1 1 O +X ENET1_MDIO 135 -950 -1950 100 R 50 50 1 1 O X SAI1_RX_DATA[1] 136 800 -1950 100 L 50 50 1 1 O -X SAI1_RX_DATA[4] 137 -950 -1950 100 R 50 50 1 1 O +X SAI1_RX_DATA[4] 137 -950 -2050 100 R 50 50 1 1 O X SAI1_RX_DATA[2] 138 800 -2050 100 L 50 50 1 1 O -X SAI1_RX_DATA[5] 139 -950 -2050 100 R 50 50 1 1 O -X SAI1_TX_DATA[5] 139 -950 -2250 100 R 50 50 1 1 O +X SAI1_RX_DATA[5] 139 -950 -2150 100 R 50 50 1 1 O X ETH1_MDI1P 14 800 4150 100 L 50 50 1 1 O X SAI1_RX_DATA[3] 140 800 -2150 100 L 50 50 1 1 O -X GND 141 -950 -2350 100 R 50 50 1 1 O -X GND 141 -950 -2150 100 R 50 50 1 1 O +X GND 141 -950 -2250 100 R 50 50 1 1 W X SAI1_TX_BCLK 142 800 -2250 100 L 50 50 1 1 O -X SAI1_TX_DATA[5] 143 -950 -2450 100 R 50 50 1 1 O +X SAI1_TX_DATA[5] 143 -950 -2350 100 R 50 50 1 1 O X SAI1_TX_DATA[0] 144 800 -2350 100 L 50 50 1 1 O -X SAI1_RX_DATA[6] 145 -950 -2550 100 R 50 50 1 1 O +X SAI1_RX_DATA[6] 145 -950 -2450 100 R 50 50 1 1 O X SAI1_TX_DATA[1] 146 800 -2450 100 L 50 50 1 1 O -X QSPI_B_SCLK 147 -950 -2650 100 R 50 50 1 1 O +X QSPI_B_SCLK 147 -950 -2550 100 R 50 50 1 1 O X SAI1_TX_DATA[2] 148 800 -2550 100 L 50 50 1 1 O -X QSPI_B_DATA[3] 149 -950 -2750 100 R 50 50 1 1 O -X ECSPI1_MISO 15 -950 4050 100 R 50 50 1 1 W -X VSYS 150 800 -2650 100 L 50 50 1 1 O -X QSPI_B_DATA[2] 151 -950 -2850 100 R 50 50 1 1 O +X QSPI_B_DATA[3] 149 -950 -2650 100 R 50 50 1 1 O +X ECSPI1_MISO 15 -950 4050 100 R 50 50 1 1 O +X VSYS 150 800 -2650 100 L 50 50 1 1 W +X QSPI_B_DATA[2] 151 -950 -2750 100 R 50 50 1 1 O X SAI1_RX_DATA[7] 152 800 -2750 100 L 50 50 1 1 O -X QSPI_B_DATA[1] 153 -950 -2950 100 R 50 50 1 1 O +X QSPI_B_DATA[1] 153 -950 -2850 100 R 50 50 1 1 O X USDHC2_RESET_B 154 800 -2850 100 L 50 50 1 1 O -X QSPI_B_DATA[0] 155 -950 -3050 100 R 50 50 1 1 O +X QSPI_B_DATA[0] 155 -950 -2950 100 R 50 50 1 1 O X USB2_VBUS_DET 156 800 -2950 100 L 50 50 1 1 O -X QSPI_B_DQS 157 -950 -3150 100 R 50 50 1 1 O +X QSPI_B_DQS 157 -950 -3050 100 R 50 50 1 1 O X USB2_RX_P 158 800 -3050 100 L 50 50 1 1 O -X GND 159 -950 -3250 100 R 50 50 1 1 O +X GND 159 -950 -3150 100 R 50 50 1 1 W X ETH1_LED1_SPD 16 800 4050 100 L 50 50 1 1 O X USB2_RX_N 160 800 -3150 100 L 50 50 1 1 O -X LVDS1_TX3_P 161 -950 -3350 100 R 50 50 1 1 O +X LVDS1_TX3_P 161 -950 -3250 100 R 50 50 1 1 O X SAI1_TX_DATA[6] 162 800 -3250 100 L 50 50 1 1 O -X LVDS1_TX3_N 163 -950 -3450 100 R 50 50 1 1 O +X LVDS1_TX3_N 163 -950 -3350 100 R 50 50 1 1 O X USB2_TX_P 164 800 -3350 100 L 50 50 1 1 O -X ONOFF 165 -950 -3550 100 R 50 50 1 1 O +X ONOFF 165 -950 -3450 100 R 50 50 1 1 O X USB2_TX_N 166 800 -3450 100 L 50 50 1 1 O -X PCIE2_RXN_N 167 -950 -3650 100 R 50 50 1 1 O -X VSYS 168 800 -3550 100 L 50 50 1 1 O -X PCIE2_RXN_P 169 -950 -3750 100 R 50 50 1 1 O -X ECSPI1_SS0 17 -950 3950 100 R 50 50 1 1 W +X PCIE2_RXN_N 167 -950 -3550 100 R 50 50 1 1 O +X VSYS 168 800 -3550 100 L 50 50 1 1 W +X PCIE2_RXN_P 169 -950 -3650 100 R 50 50 1 1 O +X ECSPI1_SS0 17 -950 3950 100 R 50 50 1 1 O X USB2_DN 170 800 -3650 100 L 50 50 1 1 O -X COLD_RESET_IN 171 -950 -3850 100 R 50 50 1 1 O +X COLD_RESET_IN 171 -950 -3750 100 R 50 50 1 1 O X USB2_DP 172 800 -3750 100 L 50 50 1 1 O -X PCIE2_TXN_N 173 -950 -3950 100 R 50 50 1 1 O +X PCIE2_TXN_N 173 -950 -3850 100 R 50 50 1 1 O X USB1_ID 174 800 -3850 100 L 50 50 1 1 O -X PCIE2_TXN_P 175 -950 -4050 100 R 50 50 1 1 O +X PCIE2_TXN_P 175 -950 -3950 100 R 50 50 1 1 O X USB1_DP 176 800 -3950 100 L 50 50 1 1 O -X GND 177 -950 -4150 100 R 50 50 1 1 O +X GND 177 -950 -4050 100 R 50 50 1 1 W X USB1_DN 178 800 -4050 100 L 50 50 1 1 O -X PCIE2_REF_CLKN 179 -950 -4250 100 R 50 50 1 1 O +X PCIE2_REF_CLKN 179 -950 -4150 100 R 50 50 1 1 O X ETH1_MDI2N 18 800 3950 100 L 50 50 1 1 O X USB1_VBUS_DET 180 800 -4150 100 L 50 50 1 1 O -X PCIE2_REF_CLKP 181 -950 -4350 100 R 50 50 1 1 O +X PCIE2_REF_CLKP 181 -950 -4250 100 R 50 50 1 1 O X USB1_RX_P 182 800 -4250 100 L 50 50 1 1 O -X VCC_RTC 183 -950 -4450 100 R 50 50 1 1 O +X VCC_RTC 183 -950 -4350 100 R 50 50 1 1 O X USB1_RX_N 184 800 -4350 100 L 50 50 1 1 O -X ALT_BOOT 185 -950 -4550 100 R 50 50 1 1 O +X ALT_BOOT 185 -950 -4450 100 R 50 50 1 1 O X VSYS 186 800 -4450 100 L 50 50 1 1 O -X NC 187 -950 -4650 100 R 50 50 1 1 O +X NC 187 -950 -4550 100 R 50 50 1 1 N X USB1_TX_P 188 800 -4550 100 L 50 50 1 1 O -X EEPROM_WP 189 -950 -4750 100 R 50 50 1 1 O +X EEPROM_WP 189 -950 -4650 100 R 50 50 1 1 O X GND 19 -950 3850 100 R 50 50 1 1 W X USB1_TX_N 190 800 -4650 100 L 50 50 1 1 O -X MICBIAS 191 -950 -4850 100 R 50 50 1 1 O +X SAI2_MCLK 191 -950 -4750 100 R 50 50 1 1 O X SAI1_RX_BCLK 192 800 -4750 100 L 50 50 1 1 O -X MICIN 193 -950 -4950 100 R 50 50 1 1 O +X MICIN 193 -950 -4850 100 R 50 50 1 1 O X SAI1_TX_DATA[4] 194 800 -4850 100 L 50 50 1 1 O -X AUD_GND 195 -950 -5050 100 R 50 50 1 1 O +X AUD_GND 195 -950 -4950 100 R 50 50 1 1 P X PWM3_OUT 196 800 -4950 100 L 50 50 1 1 O -X SAI2_TX_BCLK 197 -950 -5150 100 R 50 50 1 1 O +X SAI2_TX_BCLK 197 -950 -5050 100 R 50 50 1 1 O X PWM2_OUT 198 800 -5050 100 L 50 50 1 1 O -X AVDD33_ETH 2 800 4750 100 L 50 50 1 1 O +X SAI2_TX_SYNC 199 -950 -5150 100 R 50 50 1 1 I +X AVDD33_ETH 2 800 4750 100 L 50 50 1 1 w X ETH1_MDI2P 20 800 3850 100 L 50 50 1 1 O X PWM1_OUT 200 800 -5150 100 L 50 50 1 1 O -X SAI2_TX_SYNC 201 -950 -5250 100 R 50 50 1 1 O +X SAI2_TX_DATA[0] 201 -950 -5250 100 R 50 50 1 1 O X PMIC_ON_REQ 202 800 -5250 100 L 50 50 1 1 O X SAI2_RX_DATA[0] 203 -950 -5350 100 R 50 50 1 1 O -X VSYS 204 800 -5350 100 L 50 50 1 1 O +X VSYS 204 800 -5350 100 L 50 50 1 1 W X LVDS1_TX0_P 21 -950 3750 100 R 50 50 1 1 O X ETH1_LED3 22 800 3750 100 L 50 50 1 1 O X LVDS1_TX0_N 23 -950 3650 100 R 50 50 1 1 O @@ -2305,9 +2258,9 @@ X ETH1_MDI3N 24 800 3650 100 L 50 50 1 1 O X HDMI_DDC_SCL 25 -950 3550 100 R 50 50 1 1 O X ETH1_MDI3P 26 800 3550 100 L 50 50 1 1 O X HDMI_AUXN 27 -950 3450 100 R 50 50 1 1 O -X VSYS 28 800 3450 100 L 50 50 1 1 O +X VSYS 28 800 3450 100 L 50 50 1 1 W X HDMI_AUXP 29 -950 3350 100 R 50 50 1 1 O -X PCIE2_CLKREQ_B 3 -950 4650 100 R 50 50 1 1 W +X PCIE2_CLKREQ_B 3 -950 4650 100 R 50 50 1 1 O X HDMI_CLKP 30 800 3350 100 L 50 50 1 1 O X HDMI_DDC_SDA 31 -950 3250 100 R 50 50 1 1 O X HDMI_CLKN 32 800 3250 100 L 50 50 1 1 O @@ -2315,7 +2268,7 @@ X DSI_DP2 33 -950 3150 100 R 50 50 1 1 O X HDMI_CEC 34 800 3150 100 L 50 50 1 1 O X DSI_DN2 35 -950 3050 100 R 50 50 1 1 O X HDMI_TXP0 36 800 3050 100 L 50 50 1 1 O -X GND 37 -950 2950 100 R 50 50 1 1 O +X GND 37 -950 2950 100 R 50 50 1 1 W X HDMI_TXN0 38 800 2950 100 L 50 50 1 1 O X DSI_DP0 39 -950 2850 100 R 50 50 1 1 O X ETH1_LED_ACT 4 800 4650 100 L 50 50 1 1 O @@ -2325,17 +2278,17 @@ X HDMI_TXP1 42 800 2750 100 L 50 50 1 1 O X I2C3_SCL 43 -950 2650 100 R 50 50 1 1 O X HDMI_TXN1 44 800 2650 100 L 50 50 1 1 O X DSI_DP1 45 -950 2550 100 R 50 50 1 1 O -X VSYS 46 800 2550 100 L 50 50 1 1 O +X VSYS 46 800 2550 100 L 50 50 1 1 W X DSI_DN1 47 -950 2450 100 R 50 50 1 1 O X HDMI_TXP2 48 800 2450 100 L 50 50 1 1 O X I2C3_SDA 49 -950 2350 100 R 50 50 1 1 O -X PCIE1_CLKREQ_B 5 -950 4550 100 R 50 50 1 1 W +X PCIE1_CLKREQ_B 5 -950 4550 100 R 50 50 1 1 O X HDMI_TXN2 50 800 2350 100 L 50 50 1 1 O X DSI_DP3 51 -950 2250 100 R 50 50 1 1 O X ENET1_MDC 52 800 2250 100 L 50 50 1 1 O X DSI_DN3 53 -950 2150 100 R 50 50 1 1 O X JTAG_MOD 54 800 2150 100 L 50 50 1 1 O -X GND 55 -950 2050 100 R 50 50 1 1 O +X GND 55 -950 2050 100 R 50 50 1 1 W X JTAG_NTRST 56 800 2050 100 L 50 50 1 1 O X DSI_CKN 57 -950 1950 100 R 50 50 1 1 O X UART2_TX 58 800 1950 100 L 50 50 1 1 O @@ -2344,45 +2297,46 @@ X ETH1_MDI0N 6 800 4550 100 L 50 50 1 1 O X GPIO3_IO[17] 60 800 1850 100 L 50 50 1 1 O X USDHC2_CD_B 61 -950 1750 100 R 50 50 1 1 O X GPIO1_IO[19] 62 800 1750 100 L 50 50 1 1 O -X VSYS 64 800 1650 100 L 50 50 1 1 O -X ECSPI3_MISO 65 -950 1650 100 R 50 50 1 1 O +X UART2_RX 63 -950 1650 100 R 50 50 1 1 O +X VSYS 64 800 1650 100 L 50 50 1 1 W +X ECSPI3_MISO 65 -950 1550 100 R 50 50 1 1 O X JTAG_TCK 66 800 1550 100 L 50 50 1 1 O -X USDHC2_WP 67 -950 1550 100 R 50 50 1 1 O +X USDHC2_WP 67 -950 1450 100 R 50 50 1 1 O X JTAG_TMS 68 800 1450 100 L 50 50 1 1 O -X ECSPI3_SCLK 69 -950 1450 100 R 50 50 1 1 O -X QSPI_BSS0_B 7 -950 4450 100 R 50 50 1 1 W +X ECSPI3_SCLK 69 -950 1350 100 R 50 50 1 1 O +X QSPI_BSS0_B 7 -950 4450 100 R 50 50 1 1 O X JTAG_TDI 70 800 1350 100 L 50 50 1 1 O -X GND 71 -950 1350 100 R 50 50 1 1 O +X GND 71 -950 1250 100 R 50 50 1 1 W X JTAG_TDO 72 800 1250 100 L 50 50 1 1 O -X PCIE1_CLKREQ_B 73 -950 1250 100 R 50 50 1 1 O +X I2C4_SCL 73 -950 1150 100 R 50 50 1 1 O X QSPI_A_DATA[0] 74 800 1150 100 L 50 50 1 1 O -X PCIE2_CLKREQ_B 75 -950 1150 100 R 50 50 1 1 O +X I2C4_SDA 75 -950 1050 100 R 50 50 1 1 O X QSPI_A_DATA[1] 76 800 1050 100 L 50 50 1 1 O -X LVDS1_CLK_P 77 -950 1050 100 R 50 50 1 1 O -X VSYS 78 800 950 100 L 50 50 1 1 O -X LVDS1_CLK_N 79 -950 950 100 R 50 50 1 1 O +X LVDS1_CLK_P 77 -950 950 100 R 50 50 1 1 O +X VSYS 78 800 950 100 L 50 50 1 1 W +X LVDS1_CLK_N 79 -950 850 100 R 50 50 1 1 O X ETH1_MDI0P 8 800 4450 100 L 50 50 1 1 O X USDHC2_CLK 80 800 850 100 L 50 50 1 1 O -X GPIO3_IO[18] 81 -950 850 100 R 50 50 1 1 O +X GPIO3_IO[18] 81 -950 750 100 R 50 50 1 1 O X USDHC2_CMD 82 800 750 100 L 50 50 1 1 O -X CSI_P1_DP0 83 -950 750 100 R 50 50 1 1 O +X CSI_P1_DP0 83 -950 650 100 R 50 50 1 1 O X USDHC2_DATA0 84 800 650 100 L 50 50 1 1 O -X CSI_P1_DN0 85 -950 650 100 R 50 50 1 1 O +X CSI_P1_DN0 85 -950 550 100 R 50 50 1 1 O X USDHC2_DATA1 86 800 550 100 L 50 50 1 1 O -X GND 87 -950 550 100 R 50 50 1 1 O +X GND 87 -950 450 100 R 50 50 1 1 W X USDHC2_DATA2 88 800 450 100 L 50 50 1 1 O -X CSI_P1_DP1 89 -950 450 100 R 50 50 1 1 O -X QSPI_B_SS1_B 9 -950 4350 100 R 50 50 1 1 W +X CSI_P1_DP1 89 -950 350 100 R 50 50 1 1 O +X QSPI_B_SS1_B 9 -950 4350 100 R 50 50 1 1 O X USDHC2_DATA3 90 800 350 100 L 50 50 1 1 O -X CSI_P1_DN1 91 -950 350 100 R 50 50 1 1 O +X CSI_P1_DN1 91 -950 250 100 R 50 50 1 1 O X QSPI_A_DATA[2] 92 800 250 100 L 50 50 1 1 O -X LVDS1_TX1_P 93 -950 250 100 R 50 50 1 1 O +X LVDS1_TX1_P 93 -950 150 100 R 50 50 1 1 O X QSPI_A_DATA[3] 94 800 150 100 L 50 50 1 1 O -X LVDS1_TX1_N 95 -950 150 100 R 50 50 1 1 O -X VSYS 96 800 50 100 L 50 50 1 1 O -X LVDS1_TX2_P 97 -950 50 100 R 50 50 1 1 O +X LVDS1_TX1_N 95 -950 50 100 R 50 50 1 1 O +X VSYS 96 800 50 100 L 50 50 1 1 W +X LVDS1_TX2_P 97 -950 -50 100 R 50 50 1 1 O X QSPI_A_SS0_B 98 800 -50 100 L 50 50 1 1 O -X LVDS1_TX2_N 99 -950 -50 100 R 50 50 1 1 O +X LVDS1_TX2_N 99 -950 -150 100 R 50 50 1 1 O ENDDRAW ENDDEF # diff --git a/reform2-motherboard/reform2-motherboard/reform2-motherboard.kicad_pcb b/reform2-motherboard/reform2-motherboard/reform2-motherboard.kicad_pcb @@ -2,11 +2,11 @@ (general (thickness 1.6) - (drawings 24) + (drawings 25) (tracks 0) (zones 0) - (modules 420) - (nets 702) + (modules 422) + (nets 586) ) (page A3) @@ -122,684 +122,568 @@ (net 21 "/Reform 2 Power/VREG") (net 22 "Net-(C6-Pad1)") (net 23 +3V3) - (net 24 +5V) - (net 25 "Net-(C20-Pad1)") - (net 26 "Net-(C21-Pad1)") - (net 27 "Net-(C23-Pad1)") - (net 28 "Net-(C24-Pad1)") - (net 29 "Net-(C25-Pad1)") - (net 30 "Net-(C26-Pad1)") - (net 31 "Net-(C27-Pad2)") - (net 32 "Net-(C30-Pad1)") - (net 33 "Net-(D1-Pad1)") - (net 34 "Net-(D3-Pad2)") - (net 35 "Net-(D4-Pad2)") - (net 36 "Net-(D5-Pad2)") - (net 37 "Net-(D6-Pad2)") - (net 38 "Net-(D7-Pad2)") - (net 39 "Net-(D8-Pad2)") - (net 40 "Net-(D10-Pad1)") - (net 41 "Net-(D11-Pad2)") - (net 42 "Net-(D11-Pad1)") - (net 43 "Net-(D12-Pad2)") - (net 44 "Net-(D12-Pad1)") - (net 45 "Net-(D13-Pad2)") - (net 46 "Net-(D13-Pad1)") - (net 47 "Net-(D14-Pad2)") - (net 48 "Net-(D14-Pad1)") - (net 49 "Net-(D15-Pad2)") - (net 50 "Net-(D15-Pad1)") - (net 51 "Net-(D16-Pad2)") - (net 52 "Net-(D16-Pad1)") - (net 53 "Net-(D17-Pad2)") - (net 54 "Net-(D17-Pad1)") - (net 55 "Net-(D18-Pad2)") - (net 56 "Net-(D18-Pad1)") - (net 57 "Net-(J2-Pad30)") - (net 58 "Net-(J2-Pad25)") - (net 59 "Net-(J2-Pad24)") - (net 60 "/Reform 2 Display/EDP_BL_PWM") - (net 61 "/Reform 2 Display/EDP_BL_ENABLE") - (net 62 "/Reform 2 Display/EDP_HPD") - (net 63 "/Reform 2 Display/EDP_LCD_TEST") - (net 64 EDP_AUX_DN) - (net 65 EDP_AUX_DP) - (net 66 EDP_TX0_DN) - (net 67 EDP_TX0_DP) - (net 68 EDP_TX1_DN) - (net 69 EDP_TX1_DP) - (net 70 "Net-(J2-Pad1)") - (net 71 "Net-(J4-Pad16)") - (net 72 "Net-(J4-Pad14)") - (net 73 "Net-(J4-Pad19)") - (net 74 "Net-(J4-Pad15)") - (net 75 "Net-(J4-Pad13)") - (net 76 "Net-(L1-Pad2)") - (net 77 ETH0_A-) - (net 78 ETH0_A+) - (net 79 ETH0_D-) - (net 80 ETH0_D+) - (net 81 ETH0_B+) - (net 82 ETH0_C+) - (net 83 ETH0_C-) - (net 84 ETH0_B-) - (net 85 ETH0_LED_RX) - (net 86 "Net-(P1-Pad15)") - (net 87 ETH0_LED_LINK) - (net 88 "Net-(Q3-Pad1)") - (net 89 BATPWR) - (net 90 "Net-(Q5-Pad1)") - (net 91 "Net-(Q6-Pad1)") - (net 92 "Net-(Q7-Pad1)") - (net 93 "Net-(Q8-Pad1)") - (net 94 "Net-(Q9-Pad1)") - (net 95 "Net-(Q10-Pad1)") - (net 96 "Net-(Q11-Pad1)") - (net 97 "Net-(Q12-Pad1)") - (net 98 "Net-(R4-Pad2)") - (net 99 "Net-(R5-Pad2)") - (net 100 "Net-(R6-Pad2)") - (net 101 "Net-(R17-Pad2)") - (net 102 "Net-(R18-Pad2)") - (net 103 "Net-(R19-Pad2)") - (net 104 "Net-(R20-Pad2)") - (net 105 "Net-(R21-Pad2)") - (net 106 "Net-(R22-Pad2)") - (net 107 "Net-(R23-Pad2)") - (net 108 "Net-(R24-Pad2)") - (net 109 HDMI_HPD) - (net 110 HDMI_SCL) - (net 111 DSI_D3_N) - (net 112 DSI_D3_P) - (net 113 DSI_D0_N) - (net 114 DSI_D0_P) - (net 115 DSI_CLK_N) - (net 116 DSI_CLK_P) - (net 117 DSI_D1_N) - (net 118 DSI_D1_P) - (net 119 DSI_D2_N) - (net 120 DSI_D2_P) - (net 121 USB1_RX_N) - (net 122 USB1_RX_P) - (net 123 USB1_TX_N) - (net 124 USB1_TX_P) - (net 125 USB1_DN) - (net 126 USB1_DP) - (net 127 "Net-(U3-Pad3)") - (net 128 BMON_CS) - (net 129 BMON_SDO) - (net 130 BMON_SDI) - (net 131 BMON_SCK) - (net 132 "Net-(U4-Pad9)") - (net 133 "Net-(U4-Pad7)") - (net 134 "Net-(U4-Pad5)") - (net 135 "Net-(U4-Pad3)") - (net 136 "Net-(U5-Pad3)") - (net 137 "Net-(U6-Pad13)") - (net 138 "Net-(U6-Pad7)") - (net 139 "Net-(U9-Pad60)") - (net 140 "Net-(U9-Pad39)") - (net 141 "Net-(U10-Pad60)") - (net 142 "Net-(U10-Pad58)") - (net 143 "Net-(U10-Pad57)") - (net 144 "Net-(U10-Pad56)") - (net 145 "Net-(U10-Pad55)") - (net 146 "Net-(U10-Pad54)") - (net 147 "Net-(U10-Pad50)") - (net 148 "Net-(U10-Pad47)") - (net 149 "Net-(U10-Pad46)") - (net 150 "Net-(U10-Pad45)") - (net 151 "Net-(U10-Pad44)") - (net 152 "Net-(U10-Pad13)") - (net 153 "Net-(U10-Pad12)") - (net 154 "Net-(U10-Pad11)") - (net 155 "Net-(U10-Pad10)") - (net 156 "Net-(U10-Pad9)") - (net 157 "Net-(U10-Pad8)") - (net 158 "Net-(U10-Pad7)") - (net 159 "Net-(U10-Pad6)") - (net 160 "Net-(U10-Pad5)") - (net 161 "Net-(U10-Pad4)") - (net 162 "Net-(U11-Pad1)") - (net 163 "Net-(U11-Pad3)") - (net 164 "Net-(U11-Pad5)") - (net 165 "Net-(U11-Pad8)") - (net 166 "Net-(U11-Pad7)") - (net 167 "Net-(U11-Pad10)") - (net 168 "Net-(U11-Pad12)") - (net 169 "Net-(U11-Pad14)") - (net 170 "Net-(U11-Pad16)") - (net 171 "Net-(U11-Pad17)") - (net 172 "Net-(U11-Pad19)") - (net 173 "Net-(U11-Pad30)") - (net 174 "Net-(U11-Pad32)") - (net 175 "Net-(U11-Pad36)") - (net 176 "Net-(U11-Pad38)") - (net 177 "Net-(U11-Pad42)") - (net 178 "Net-(U11-Pad46)") - (net 179 "Net-(U11-Pad45)") - (net 180 "Net-(U11-Pad47)") - (net 181 "Net-(U11-Pad49)") - (net 182 "Net-(U11-Pad51)") - (net 183 "Net-(U12-Pad5)") - (net 184 "Net-(U12-Pad7)") - (net 185 HDMI_CEC) - (net 186 HDMI_SDA) - (net 187 +36V) - (net 188 "Net-(C32-Pad1)") - (net 189 "Net-(C33-Pad1)") - (net 190 "Net-(C34-Pad1)") - (net 191 +1V2) - (net 192 +1V1) - (net 193 "Net-(C39-Pad2)") - (net 194 USB3_2_SSTXN) - (net 195 "Net-(C40-Pad2)") - (net 196 USB3_1_SSTXN) - (net 197 "Net-(C41-Pad2)") - (net 198 USB3_2_SSTXP) - (net 199 "Net-(C42-Pad2)") - (net 200 USB3_1_SSTXP) - (net 201 USB_PWR) - (net 202 "Net-(C44-Pad1)") - (net 203 "Net-(C45-Pad1)") - (net 204 "Net-(D3-Pad1)") - (net 205 "Net-(D19-Pad1)") - (net 206 "Net-(D19-Pad2)") - (net 207 "Net-(D20-Pad1)") - (net 208 "Net-(D22-Pad2)") - (net 209 "Net-(D22-Pad1)") - (net 210 "Net-(F1-Pad1)") - (net 211 "Net-(F2-Pad2)") - (net 212 USB3_2_SSRXP) - (net 213 USB3_2_SSRXN) - (net 214 USB3_2_DP) - (net 215 USB3_2_DN) - (net 216 USB3_2_VBUS) - (net 217 USB3_1_SSRXP) - (net 218 USB3_1_SSRXN) - (net 219 USB3_1_DP) - (net 220 USB3_1_DN) - (net 221 USB3_1_VBUS) - (net 222 "Net-(J7-Pad5)") - (net 223 "Net-(J7-Pad6)") - (net 224 "Net-(J7-Pad4)") - (net 225 "Net-(Q1-Pad5)") - (net 226 "Net-(Q1-Pad4)") - (net 227 "Net-(Q2-Pad4)") - (net 228 "Net-(R3-Pad2)") - (net 229 "Net-(R3-Pad1)") - (net 230 "Net-(R49-Pad1)") - (net 231 "Net-(R51-Pad2)") - (net 232 "Net-(R52-Pad1)") - (net 233 "Net-(R54-Pad2)") - (net 234 "Net-(R57-Pad1)") - (net 235 "Net-(R58-Pad1)") - (net 236 "Net-(R59-Pad1)") - (net 237 "Net-(R60-Pad1)") - (net 238 "Net-(R61-Pad1)") - (net 239 "Net-(R63-Pad1)") - (net 240 "Net-(R64-Pad2)") - (net 241 EDP_SCL) - (net 242 +1V8) - (net 243 EDP_SDA) - (net 244 PCIE1_CLK_N) - (net 245 PCIE1_CLK_P) - (net 246 PCIE2_CLK_N) - (net 247 PCIE2_CLK_P) - (net 248 PCIE2_RX_P) - (net 249 PCIE2_RX_N) - (net 250 PCIE2_TX_P) - (net 251 PCIE2_TX_N) - (net 252 PCIE1_RX_P) - (net 253 PCIE1_RX_N) - (net 254 PCIE1_TX_P) - (net 255 PCIE1_TX_N) - (net 256 "Net-(U3-Pad7)") - (net 257 "Net-(U4-Pad28)") - (net 258 "Net-(U5-Pad7)") - (net 259 USB3_1_EN) - (net 260 USB3_2_EN) - (net 261 USB3_3_EN) - (net 262 USB3_4_EN) - (net 263 USB3_4_SSRXN) - (net 264 USB3_4_SSRXP) - (net 265 USB3_4_SSTXN) - (net 266 USB3_4_SSTXP) - (net 267 USB3_4_DN) - (net 268 USB3_4_DP) - (net 269 USB3_3_SSRXN) - (net 270 USB3_3_SSRXP) - (net 271 USB3_3_SSTXN) - (net 272 USB3_3_SSTXP) - (net 273 USB3_3_DN) - (net 274 USB3_3_DP) - (net 275 EDP_IRQ) - (net 276 EDP_RESETn) - (net 277 PCIE_RESETn) - (net 278 "Net-(U13-Pad4)") - (net 279 "Net-(U14-Pad4)") - (net 280 "Net-(C48-Pad1)") - (net 281 "Net-(C51-Pad1)") - (net 282 "Net-(C52-Pad1)") - (net 283 "Net-(C58-Pad1)") - (net 284 "Net-(J8-Pad3)") - (net 285 "Net-(J8-Pad4)") - (net 286 "Net-(J8-Pad1)") - (net 287 "Net-(J8-Pad2)") - (net 288 "Net-(J9-Pad3)") - (net 289 "Net-(J9-Pad2)") - (net 290 "Net-(J10-Pad5)") - (net 291 "Net-(J10-Pad6)") - (net 292 "Net-(J10-Pad7)") - (net 293 "Net-(J10-Pad8)") - (net 294 CHG_SDA) - (net 295 CHG_SCL) - (net 296 "Net-(R70-Pad2)") - (net 297 "Net-(R72-Pad2)") - (net 298 "/Reform 2 Power/LPC_SCK1b") - (net 299 "/Reform 2 Power/LPC_MISO1b") - (net 300 "/Reform 2 Power/LPC_MOSI1b") - (net 301 "/Reform 2 Power/LPC_SSEL1") - (net 302 "Net-(R77-Pad2)") - (net 303 "/Reform 2 Power/LPC_UFTOGG") - (net 304 USB2_TX_N) - (net 305 USB2_TX_P) - (net 306 "Net-(U18-Pad48)") - (net 307 "/Reform 2 Power/LPC_TXDa") - (net 308 "/Reform 2 Power/LPC_RXDa") - (net 309 "/Reform 2 Power/LPC_SCLKa") - (net 310 "/Reform 2 Power/LPC_SCK1a") - (net 311 "/Reform 2 Power/LPC_AD7") - (net 312 "/Reform 2 Power/LPC_AD5") - (net 313 "/Reform 2 Power/LPC_SWDIO") - (net 314 "/Reform 2 Power/LPC_RXDb") - (net 315 "/Reform 2 Power/LPC_TXDb") - (net 316 "/Reform 2 Power/LPC_TRST") - (net 317 "/Reform 2 Power/LPC_TDO") - (net 318 "/Reform 2 Power/LPC_TMS") - (net 319 "/Reform 2 Power/LPC_TDI") - (net 320 "/Reform 2 Power/LPC_SCK0b") - (net 321 "/Reform 2 Power/LPC_MISO1a") - (net 322 "/Reform 2 Power/LPC_SCK0a") - (net 323 "/Reform 2 Power/LPC_MOSI0") - (net 324 "/Reform 2 Power/LPC_MISO0") - (net 325 "Net-(U18-Pad25)") - (net 326 "/Reform 2 Power/LPC_SCLKc") - (net 327 "/Reform 2 Power/LPC_NCTS") - (net 328 "/Reform 2 Power/LPC_NUSBCON") - (net 329 "/Reform 2 Power/LPC_SCLKb") - (net 330 "/Reform 2 Power/LPC_MOSI1a") - (net 331 "/Reform 2 Power/LPC_UVBUS") - (net 332 "/Reform 2 Power/LPC_TXDc") - (net 333 "/Reform 2 Power/LPC_RXDc") - (net 334 "/Reform 2 Power/LPC_SSEL0") - (net 335 "Net-(U18-Pad9)") - (net 336 "/Reform 2 Power/LPC_NRESET") - (net 337 "/Reform 2 Power/LPC_NDTR") - (net 338 "Net-(U18-Pad1)") - (net 339 "Net-(J10-Pad69)") - (net 340 "Net-(J10-Pad67)") - (net 341 "Net-(J10-Pad58)") - (net 342 "Net-(J10-Pad56)") - (net 343 "Net-(J10-Pad48)") - (net 344 "Net-(J10-Pad46)") - (net 345 "Net-(J10-Pad37)") - (net 346 "Net-(J10-Pad36)") - (net 347 "Net-(J10-Pad35)") - (net 348 "Net-(J10-Pad34)") - (net 349 "Net-(J10-Pad32)") - (net 350 "Net-(J10-Pad31)") - (net 351 "Net-(J10-Pad30)") - (net 352 "Net-(J10-Pad29)") - (net 353 "Net-(J10-Pad28)") - (net 354 "Net-(J10-Pad26)") - (net 355 "Net-(J10-Pad25)") - (net 356 "Net-(J10-Pad24)") - (net 357 "Net-(J10-Pad23)") - (net 358 "Net-(J10-Pad22)") - (net 359 "Net-(J10-Pad20)") - (net 360 "Net-(J10-Pad11)") - (net 361 BAT1+) - (net 362 BAT2+) - (net 363 BAT3+) - (net 364 BAT4+) - (net 365 BAT5+) - (net 366 BAT6+) - (net 367 BAT7+) - (net 368 BAT8+) - (net 369 "Net-(J14-Pad3)") - (net 370 "Net-(J14-Pad2)") - (net 371 +1V5) - (net 372 "Net-(C80-Pad2)") - (net 373 "Net-(C82-Pad2)") - (net 374 "Net-(D23-Pad2)") - (net 375 "Net-(D23-Pad1)") - (net 376 "Net-(C90-Pad1)") - (net 377 "Net-(C69-Pad1)") - (net 378 "Net-(C71-Pad1)") - (net 379 USB3_3_VBUS) - (net 380 "Net-(C72-Pad1)") - (net 381 USB3_4_VBUS) - (net 382 "Net-(C81-Pad1)") - (net 383 "Net-(C83-Pad1)") - (net 384 "Net-(C74-Pad1)") - (net 385 "Net-(C67-Pad1)") - (net 386 "Net-(J10-Pad68)") - (net 387 "Net-(J10-Pad54)") - (net 388 "/Reform 2 PCIe/M2_CLKREQn") - (net 389 "Net-(C121-Pad1)") - (net 390 "Net-(C122-Pad1)") - (net 391 "/Reform 2 PCIe/M2_SMB_ALERTn") - (net 392 "/Reform 2 PCIe/M2_SMB_DATA") - (net 393 "/Reform 2 PCIe/M2_SMB_CLK") - (net 394 "Net-(J10-Pad38)") - (net 395 "Net-(C75-Pad1)") - (net 396 "Net-(J17-Pad1)") - (net 397 "Net-(R56-Pad1)") - (net 398 "Net-(R78-Pad1)") - (net 399 "Net-(R79-Pad1)") - (net 400 "Net-(R80-Pad1)") - (net 401 "Net-(R103-Pad1)") - (net 402 USB3_2_OVERCURn) - (net 403 USB3_1_OVERCURn) - (net 404 USB3_3_OVERCURn) - (net 405 USB3_4_OVERCURn) - (net 406 "Net-(R102-Pad2)") - (net 407 "Net-(U9-Pad38)") - (net 408 "Net-(U9-Pad37)") - (net 409 "Net-(C105-Pad2)") - (net 410 "Net-(C108-Pad2)") - (net 411 "Net-(C106-Pad2)") - (net 412 "Net-(C109-Pad2)") - (net 413 "Net-(C107-Pad2)") - (net 414 "Net-(C110-Pad2)") - (net 415 PCIE_WDISn) - (net 416 "Net-(R88-Pad1)") - (net 417 "Net-(R87-Pad1)") - (net 418 "Net-(R89-Pad1)") - (net 419 "Net-(R83-Pad2)") - (net 420 "Net-(R82-Pad1)") - (net 421 "Net-(R100-Pad1)") - (net 422 "Net-(R99-Pad1)") - (net 423 "Net-(R101-Pad1)") - (net 424 "Net-(R95-Pad2)") - (net 425 "Net-(R94-Pad1)") - (net 426 "Net-(C126-Pad1)") - (net 427 "Net-(C128-Pad2)") - (net 428 "Net-(C128-Pad1)") - (net 429 "Net-(C141-Pad2)") - (net 430 "Net-(C145-Pad2)") - (net 431 "Net-(C145-Pad1)") - (net 432 "Net-(C147-Pad2)") - (net 433 "Net-(C147-Pad1)") - (net 434 "Net-(C148-Pad2)") - (net 435 "Net-(C148-Pad1)") - (net 436 "Net-(C149-Pad2)") - (net 437 "Net-(C149-Pad1)") - (net 438 "Net-(C150-Pad1)") - (net 439 "Net-(C153-Pad2)") - (net 440 "Net-(C153-Pad1)") - (net 441 "Net-(C156-Pad1)") - (net 442 "Net-(C158-Pad2)") - (net 443 "Net-(C158-Pad1)") - (net 444 "Net-(C159-Pad2)") - (net 445 "Net-(C159-Pad1)") - (net 446 IMX_UART1_RX) - (net 447 IMX_UART1_TX) - (net 448 IMX_UART2_RX) - (net 449 IMX_UART2_TX) - (net 450 "Net-(J21-Pad3)") - (net 451 "Net-(J21-Pad1)") - (net 452 USB_RESETn) - (net 453 "Net-(J10-Pad13)") - (net 454 "Net-(R111-Pad2)") - (net 455 "Net-(R112-Pad2)") - (net 456 "Net-(R113-Pad1)") - (net 457 IMX_POR_B) - (net 458 IMX_RESETn) - (net 459 IMX_ONOFF) - (net 460 IMX_JTAG_TMS) - (net 461 IMX_JTAG_TDI) - (net 462 IMX_JTAG_RSTn) - (net 463 IMX_JTAG_TCK) - (net 464 RTC_SCL) - (net 465 RTC_SDA) - (net 466 "Net-(R123-Pad2)") - (net 467 LPC_MISO) - (net 468 LPC_MOSI) - (net 469 LPC_SCK) - (net 470 "Net-(R129-Pad1)") - (net 471 "Net-(R130-Pad1)") - (net 472 BACKLIGHT_PWM) - (net 473 BACKLIGHT_EN) - (net 474 DAC_SCL) - (net 475 DAC_SDA) - (net 476 "Net-(R137-Pad2)") - (net 477 DAC_MCLK) - (net 478 "Net-(R138-Pad1)") - (net 479 "Net-(R139-Pad2)") - (net 480 "Net-(R139-Pad1)") - (net 481 "Net-(R140-Pad1)") - (net 482 "Net-(R141-Pad1)") - (net 483 "Net-(U1-Pad204)") - (net 484 "Net-(U1-Pad202)") - (net 485 "Net-(U1-Pad200)") - (net 486 "Net-(U1-Pad198)") - (net 487 "Net-(U1-Pad196)") - (net 488 "Net-(U1-Pad194)") - (net 489 "Net-(U1-Pad192)") - (net 490 "Net-(U1-Pad190)") - (net 491 "Net-(U1-Pad188)") - (net 492 "Net-(U1-Pad186)") - (net 493 "Net-(U1-Pad184)") - (net 494 "Net-(U1-Pad182)") - (net 495 "Net-(U1-Pad180)") - (net 496 "Net-(U1-Pad178)") - (net 497 "Net-(U1-Pad176)") - (net 498 "Net-(U1-Pad174)") - (net 499 "Net-(U1-Pad172)") - (net 500 "Net-(U1-Pad170)") - (net 501 "Net-(U1-Pad168)") - (net 502 "Net-(U1-Pad166)") - (net 503 "Net-(U1-Pad164)") - (net 504 "Net-(U1-Pad162)") - (net 505 "Net-(U1-Pad160)") - (net 506 "Net-(U1-Pad158)") - (net 507 "Net-(U1-Pad156)") - (net 508 "Net-(U1-Pad154)") - (net 509 "Net-(U1-Pad152)") - (net 510 "Net-(U1-Pad150)") - (net 511 "Net-(U1-Pad148)") - (net 512 "Net-(U1-Pad146)") - (net 513 "Net-(U1-Pad144)") - (net 514 "Net-(U1-Pad142)") - (net 515 "Net-(U1-Pad140)") - (net 516 "Net-(U1-Pad138)") - (net 517 "Net-(U1-Pad136)") - (net 518 "Net-(U1-Pad134)") - (net 519 "Net-(U1-Pad132)") - (net 520 "Net-(U1-Pad130)") - (net 521 "Net-(U1-Pad128)") - (net 522 "Net-(U1-Pad126)") - (net 523 "Net-(U1-Pad124)") - (net 524 "Net-(U1-Pad122)") - (net 525 "Net-(U1-Pad120)") - (net 526 "Net-(U1-Pad118)") - (net 527 "Net-(U1-Pad116)") - (net 528 "Net-(U1-Pad114)") - (net 529 "Net-(U1-Pad112)") - (net 530 "Net-(U1-Pad110)") - (net 531 "Net-(U1-Pad108)") - (net 532 "Net-(U1-Pad106)") - (net 533 "Net-(U1-Pad104)") - (net 534 "Net-(U1-Pad102)") - (net 535 "Net-(U1-Pad100)") - (net 536 "Net-(U1-Pad98)") - (net 537 "Net-(U1-Pad96)") - (net 538 "Net-(U1-Pad94)") - (net 539 "Net-(U1-Pad92)") - (net 540 "Net-(U1-Pad90)") - (net 541 "Net-(U1-Pad88)") - (net 542 "Net-(U1-Pad86)") - (net 543 "Net-(U1-Pad84)") - (net 544 "Net-(U1-Pad82)") - (net 545 "Net-(U1-Pad80)") - (net 546 "Net-(U1-Pad78)") - (net 547 "Net-(U1-Pad76)") - (net 548 "Net-(U1-Pad74)") - (net 549 "Net-(U1-Pad72)") - (net 550 "Net-(U1-Pad70)") - (net 551 "Net-(U1-Pad68)") - (net 552 "Net-(U1-Pad66)") - (net 553 "Net-(U1-Pad64)") - (net 554 "Net-(U1-Pad62)") - (net 555 "Net-(U1-Pad60)") - (net 556 "Net-(U1-Pad58)") - (net 557 "Net-(U1-Pad56)") - (net 558 "Net-(U1-Pad54)") - (net 559 "Net-(U1-Pad52)") - (net 560 "Net-(U1-Pad50)") - (net 561 "Net-(U1-Pad48)") - (net 562 "Net-(U1-Pad46)") - (net 563 "Net-(U1-Pad44)") - (net 564 "Net-(U1-Pad42)") - (net 565 "Net-(U1-Pad40)") - (net 566 "Net-(U1-Pad38)") - (net 567 "Net-(U1-Pad36)") - (net 568 "Net-(U1-Pad34)") - (net 569 "Net-(U1-Pad32)") - (net 570 "Net-(U1-Pad30)") - (net 571 "Net-(U1-Pad28)") - (net 572 "Net-(U1-Pad26)") - (net 573 "Net-(U1-Pad24)") - (net 574 "Net-(U1-Pad22)") - (net 575 "Net-(U1-Pad20)") - (net 576 "Net-(U1-Pad18)") - (net 577 "Net-(U1-Pad16)") - (net 578 "Net-(U1-Pad14)") - (net 579 "Net-(U1-Pad12)") - (net 580 "Net-(U1-Pad10)") - (net 581 "Net-(U1-Pad8)") - (net 582 "Net-(U1-Pad6)") - (net 583 "Net-(U1-Pad4)") - (net 584 "Net-(U1-Pad2)") - (net 585 "Net-(U1-Pad203)") - (net 586 "Net-(U1-Pad201)") - (net 587 "Net-(U1-Pad197)") - (net 588 "Net-(U1-Pad195)") - (net 589 "Net-(U1-Pad193)") - (net 590 "Net-(U1-Pad191)") - (net 591 "Net-(U1-Pad189)") - (net 592 "Net-(U1-Pad187)") - (net 593 "Net-(U1-Pad185)") - (net 594 "Net-(U1-Pad183)") - (net 595 "Net-(U1-Pad181)") - (net 596 "Net-(U1-Pad179)") - (net 597 "Net-(U1-Pad177)") - (net 598 "Net-(U1-Pad175)") - (net 599 "Net-(U1-Pad173)") - (net 600 "Net-(U1-Pad171)") - (net 601 "Net-(U1-Pad169)") - (net 602 "Net-(U1-Pad167)") - (net 603 "Net-(U1-Pad165)") - (net 604 "Net-(U1-Pad163)") - (net 605 "Net-(U1-Pad161)") - (net 606 "Net-(U1-Pad159)") - (net 607 "Net-(U1-Pad157)") - (net 608 "Net-(U1-Pad155)") - (net 609 "Net-(U1-Pad153)") - (net 610 "Net-(U1-Pad151)") - (net 611 "Net-(U1-Pad149)") - (net 612 "Net-(U1-Pad147)") - (net 613 "Net-(U1-Pad145)") - (net 614 "Net-(U1-Pad143)") - (net 615 "Net-(U1-Pad141)") - (net 616 "Net-(U1-Pad139)") - (net 617 "Net-(U1-Pad137)") - (net 618 "Net-(U1-Pad135)") - (net 619 "Net-(U1-Pad133)") - (net 620 "Net-(U1-Pad131)") - (net 621 "Net-(U1-Pad129)") - (net 622 "Net-(U1-Pad127)") - (net 623 "Net-(U1-Pad125)") - (net 624 "Net-(U1-Pad123)") - (net 625 "Net-(U1-Pad121)") - (net 626 "Net-(U1-Pad119)") - (net 627 "Net-(U1-Pad117)") - (net 628 "Net-(U1-Pad115)") - (net 629 "Net-(U1-Pad113)") - (net 630 "Net-(U1-Pad111)") - (net 631 "Net-(U1-Pad109)") - (net 632 "Net-(U1-Pad107)") - (net 633 "Net-(U1-Pad105)") - (net 634 "Net-(U1-Pad103)") - (net 635 "Net-(U1-Pad101)") - (net 636 "Net-(U1-Pad99)") - (net 637 "Net-(U1-Pad97)") - (net 638 "Net-(U1-Pad95)") - (net 639 "Net-(U1-Pad93)") - (net 640 "Net-(U1-Pad91)") - (net 641 "Net-(U1-Pad89)") - (net 642 "Net-(U1-Pad87)") - (net 643 "Net-(U1-Pad85)") - (net 644 "Net-(U1-Pad83)") - (net 645 "Net-(U1-Pad81)") - (net 646 "Net-(U1-Pad79)") - (net 647 "Net-(U1-Pad77)") - (net 648 "Net-(U1-Pad75)") - (net 649 "Net-(U1-Pad73)") - (net 650 "Net-(U1-Pad71)") - (net 651 "Net-(U1-Pad69)") - (net 652 "Net-(U1-Pad67)") - (net 653 "Net-(U1-Pad65)") - (net 654 "Net-(U1-Pad61)") - (net 655 "Net-(U1-Pad59)") - (net 656 "Net-(U1-Pad57)") - (net 657 "Net-(U1-Pad55)") - (net 658 "Net-(U1-Pad53)") - (net 659 "Net-(U1-Pad51)") - (net 660 "Net-(U1-Pad49)") - (net 661 "Net-(U1-Pad47)") - (net 662 "Net-(U1-Pad45)") - (net 663 "Net-(U1-Pad43)") - (net 664 "Net-(U1-Pad41)") - (net 665 "Net-(U1-Pad39)") - (net 666 "Net-(U1-Pad37)") - (net 667 "Net-(U1-Pad35)") - (net 668 "Net-(U1-Pad33)") - (net 669 "Net-(U1-Pad31)") - (net 670 "Net-(U1-Pad29)") - (net 671 "Net-(U1-Pad27)") - (net 672 "Net-(U1-Pad25)") - (net 673 "Net-(U1-Pad23)") - (net 674 "Net-(U1-Pad21)") - (net 675 "Net-(U1-Pad19)") - (net 676 "Net-(U1-Pad17)") - (net 677 "Net-(U1-Pad15)") - (net 678 "Net-(U1-Pad13)") - (net 679 "Net-(U1-Pad11)") - (net 680 "Net-(U1-Pad9)") - (net 681 "Net-(U1-Pad7)") - (net 682 "Net-(U1-Pad5)") - (net 683 "Net-(U1-Pad3)") - (net 684 "Net-(U1-Pad1)") - (net 685 RTC_CLKOUT) - (net 686 "Net-(U8-Pad2)") - (net 687 "Net-(U8-Pad1)") - (net 688 "Net-(U20-Pad26)") - (net 689 "Net-(U20-Pad20)") - (net 690 "Net-(U20-Pad19)") - (net 691 DAC_RXFS) - (net 692 DAC_DIN) - (net 693 DAC_TXFS) - (net 694 DAC_DOUT) - (net 695 DAC_BCLK) - (net 696 "Net-(U21-Pad8)") - (net 697 "Net-(U21-Pad6)") - (net 698 "Net-(U21-Pad5)") - (net 699 "Net-(SW4-Pad4)") - (net 700 "Net-(SW4-Pad3)") - (net 701 "Net-(C86-Pad1)") + (net 24 "Net-(C20-Pad1)") + (net 25 "Net-(C21-Pad1)") + (net 26 "Net-(C23-Pad1)") + (net 27 "Net-(C24-Pad1)") + (net 28 "Net-(C25-Pad1)") + (net 29 "Net-(C26-Pad1)") + (net 30 "Net-(C27-Pad2)") + (net 31 "Net-(C30-Pad1)") + (net 32 "Net-(D1-Pad1)") + (net 33 "Net-(D3-Pad2)") + (net 34 "Net-(D4-Pad2)") + (net 35 "Net-(D5-Pad2)") + (net 36 "Net-(D6-Pad2)") + (net 37 "Net-(D7-Pad2)") + (net 38 "Net-(D8-Pad2)") + (net 39 "Net-(D10-Pad1)") + (net 40 "Net-(D11-Pad2)") + (net 41 "Net-(D11-Pad1)") + (net 42 "Net-(D12-Pad2)") + (net 43 "Net-(D12-Pad1)") + (net 44 "Net-(D13-Pad2)") + (net 45 "Net-(D13-Pad1)") + (net 46 "Net-(D14-Pad2)") + (net 47 "Net-(D14-Pad1)") + (net 48 "Net-(D15-Pad2)") + (net 49 "Net-(D15-Pad1)") + (net 50 "Net-(D16-Pad2)") + (net 51 "Net-(D16-Pad1)") + (net 52 "Net-(D17-Pad2)") + (net 53 "Net-(D17-Pad1)") + (net 54 "Net-(D18-Pad2)") + (net 55 "Net-(D18-Pad1)") + (net 56 "Net-(J2-Pad30)") + (net 57 "Net-(J2-Pad25)") + (net 58 "Net-(J2-Pad24)") + (net 59 "/Reform 2 Display/EDP_BL_PWM") + (net 60 "/Reform 2 Display/EDP_BL_ENABLE") + (net 61 "/Reform 2 Display/EDP_HPD") + (net 62 "/Reform 2 Display/EDP_LCD_TEST") + (net 63 EDP_AUX_DN) + (net 64 EDP_AUX_DP) + (net 65 EDP_TX0_DN) + (net 66 EDP_TX0_DP) + (net 67 EDP_TX1_DN) + (net 68 EDP_TX1_DP) + (net 69 "Net-(J2-Pad1)") + (net 70 "Net-(J4-Pad16)") + (net 71 "Net-(J4-Pad14)") + (net 72 "Net-(J4-Pad19)") + (net 73 "Net-(J4-Pad15)") + (net 74 "Net-(J4-Pad13)") + (net 75 "Net-(L1-Pad2)") + (net 76 ETH0_A-) + (net 77 ETH0_A+) + (net 78 ETH0_D-) + (net 79 ETH0_D+) + (net 80 ETH0_B+) + (net 81 ETH0_C+) + (net 82 ETH0_C-) + (net 83 ETH0_B-) + (net 84 ETH0_LED_RX) + (net 85 "Net-(Q3-Pad1)") + (net 86 BATPWR) + (net 87 "Net-(Q5-Pad1)") + (net 88 "Net-(Q6-Pad1)") + (net 89 "Net-(Q7-Pad1)") + (net 90 "Net-(Q8-Pad1)") + (net 91 "Net-(Q9-Pad1)") + (net 92 "Net-(Q10-Pad1)") + (net 93 "Net-(Q11-Pad1)") + (net 94 "Net-(Q12-Pad1)") + (net 95 "Net-(R4-Pad2)") + (net 96 "Net-(R5-Pad2)") + (net 97 "Net-(R6-Pad2)") + (net 98 "Net-(R17-Pad2)") + (net 99 "Net-(R18-Pad2)") + (net 100 "Net-(R19-Pad2)") + (net 101 "Net-(R20-Pad2)") + (net 102 "Net-(R21-Pad2)") + (net 103 "Net-(R22-Pad2)") + (net 104 "Net-(R23-Pad2)") + (net 105 "Net-(R24-Pad2)") + (net 106 HDMI_HPD) + (net 107 HDMI_SCL) + (net 108 DSI_D3_N) + (net 109 DSI_D3_P) + (net 110 DSI_D0_N) + (net 111 DSI_D0_P) + (net 112 DSI_CLK_N) + (net 113 DSI_CLK_P) + (net 114 DSI_D1_N) + (net 115 DSI_D1_P) + (net 116 DSI_D2_N) + (net 117 DSI_D2_P) + (net 118 USB1_RX_N) + (net 119 USB1_RX_P) + (net 120 USB1_TX_N) + (net 121 USB1_TX_P) + (net 122 USB1_DN) + (net 123 USB1_DP) + (net 124 "Net-(U3-Pad3)") + (net 125 BMON_CS) + (net 126 BMON_SDO) + (net 127 BMON_SDI) + (net 128 BMON_SCK) + (net 129 "Net-(U4-Pad9)") + (net 130 "Net-(U4-Pad7)") + (net 131 "Net-(U4-Pad5)") + (net 132 "Net-(U4-Pad3)") + (net 133 "Net-(U5-Pad3)") + (net 134 "Net-(U6-Pad13)") + (net 135 "Net-(U6-Pad7)") + (net 136 "Net-(U9-Pad60)") + (net 137 "Net-(U9-Pad39)") + (net 138 "Net-(U10-Pad60)") + (net 139 "Net-(U10-Pad58)") + (net 140 "Net-(U10-Pad57)") + (net 141 "Net-(U10-Pad56)") + (net 142 "Net-(U10-Pad55)") + (net 143 "Net-(U10-Pad54)") + (net 144 "Net-(U10-Pad50)") + (net 145 "Net-(U10-Pad47)") + (net 146 "Net-(U10-Pad46)") + (net 147 "Net-(U10-Pad45)") + (net 148 "Net-(U10-Pad44)") + (net 149 "Net-(U10-Pad13)") + (net 150 "Net-(U10-Pad12)") + (net 151 "Net-(U10-Pad11)") + (net 152 "Net-(U10-Pad10)") + (net 153 "Net-(U10-Pad9)") + (net 154 "Net-(U10-Pad8)") + (net 155 "Net-(U10-Pad7)") + (net 156 "Net-(U10-Pad6)") + (net 157 "Net-(U10-Pad5)") + (net 158 "Net-(U10-Pad4)") + (net 159 "Net-(U11-Pad1)") + (net 160 "Net-(U11-Pad3)") + (net 161 "Net-(U11-Pad5)") + (net 162 "Net-(U11-Pad8)") + (net 163 "Net-(U11-Pad10)") + (net 164 "Net-(U11-Pad12)") + (net 165 "Net-(U11-Pad14)") + (net 166 "Net-(U11-Pad16)") + (net 167 "Net-(U11-Pad17)") + (net 168 "Net-(U11-Pad19)") + (net 169 "Net-(U11-Pad30)") + (net 170 "Net-(U11-Pad32)") + (net 171 "Net-(U11-Pad36)") + (net 172 "Net-(U11-Pad38)") + (net 173 "Net-(U11-Pad42)") + (net 174 "Net-(U11-Pad46)") + (net 175 "Net-(U11-Pad45)") + (net 176 "Net-(U11-Pad47)") + (net 177 "Net-(U11-Pad49)") + (net 178 "Net-(U11-Pad51)") + (net 179 "Net-(U12-Pad5)") + (net 180 "Net-(U12-Pad7)") + (net 181 HDMI_CEC) + (net 182 HDMI_SDA) + (net 183 +36V) + (net 184 "Net-(C32-Pad1)") + (net 185 "Net-(C33-Pad1)") + (net 186 "Net-(C34-Pad1)") + (net 187 +1V2) + (net 188 +1V1) + (net 189 "Net-(C39-Pad2)") + (net 190 USB3_2_SSTXN) + (net 191 "Net-(C40-Pad2)") + (net 192 USB3_1_SSTXN) + (net 193 "Net-(C41-Pad2)") + (net 194 USB3_2_SSTXP) + (net 195 "Net-(C42-Pad2)") + (net 196 USB3_1_SSTXP) + (net 197 USB_PWR) + (net 198 "Net-(C44-Pad1)") + (net 199 "Net-(C45-Pad1)") + (net 200 "Net-(D3-Pad1)") + (net 201 "Net-(D19-Pad1)") + (net 202 "Net-(D19-Pad2)") + (net 203 "Net-(D20-Pad1)") + (net 204 "Net-(D22-Pad2)") + (net 205 "Net-(D22-Pad1)") + (net 206 "Net-(F1-Pad1)") + (net 207 "Net-(F2-Pad2)") + (net 208 USB3_2_SSRXP) + (net 209 USB3_2_SSRXN) + (net 210 USB3_2_DP) + (net 211 USB3_2_DN) + (net 212 USB3_2_VBUS) + (net 213 USB3_1_SSRXP) + (net 214 USB3_1_SSRXN) + (net 215 USB3_1_DP) + (net 216 USB3_1_DN) + (net 217 USB3_1_VBUS) + (net 218 "Net-(J7-Pad5)") + (net 219 "Net-(J7-Pad6)") + (net 220 "Net-(J7-Pad4)") + (net 221 "Net-(Q1-Pad5)") + (net 222 "Net-(Q1-Pad4)") + (net 223 "Net-(Q2-Pad4)") + (net 224 "Net-(R3-Pad2)") + (net 225 "Net-(R3-Pad1)") + (net 226 "Net-(R49-Pad1)") + (net 227 "Net-(R51-Pad2)") + (net 228 "Net-(R52-Pad1)") + (net 229 "Net-(R54-Pad2)") + (net 230 "Net-(R57-Pad1)") + (net 231 "Net-(R58-Pad1)") + (net 232 "Net-(R59-Pad1)") + (net 233 "Net-(R60-Pad1)") + (net 234 "Net-(R61-Pad1)") + (net 235 "Net-(R63-Pad1)") + (net 236 "Net-(R64-Pad2)") + (net 237 EDP_SCL) + (net 238 +1V8) + (net 239 EDP_SDA) + (net 240 PCIE1_CLK_N) + (net 241 PCIE1_CLK_P) + (net 242 PCIE2_CLK_N) + (net 243 PCIE2_CLK_P) + (net 244 PCIE2_RX_P) + (net 245 PCIE2_RX_N) + (net 246 PCIE2_TX_P) + (net 247 PCIE2_TX_N) + (net 248 PCIE1_RX_P) + (net 249 PCIE1_RX_N) + (net 250 PCIE1_TX_P) + (net 251 PCIE1_TX_N) + (net 252 "Net-(U3-Pad7)") + (net 253 "Net-(U4-Pad28)") + (net 254 "Net-(U5-Pad7)") + (net 255 USB3_1_EN) + (net 256 USB3_2_EN) + (net 257 USB3_3_EN) + (net 258 USB3_4_EN) + (net 259 USB3_4_SSRXN) + (net 260 USB3_4_SSRXP) + (net 261 USB3_4_SSTXN) + (net 262 USB3_4_SSTXP) + (net 263 USB3_4_DN) + (net 264 USB3_4_DP) + (net 265 USB3_3_SSRXN) + (net 266 USB3_3_SSRXP) + (net 267 USB3_3_SSTXN) + (net 268 USB3_3_SSTXP) + (net 269 USB3_3_DN) + (net 270 USB3_3_DP) + (net 271 EDP_IRQ) + (net 272 EDP_RESETn) + (net 273 PCIE_RESETn) + (net 274 "Net-(U13-Pad4)") + (net 275 "Net-(U14-Pad4)") + (net 276 "Net-(C48-Pad1)") + (net 277 "Net-(C51-Pad1)") + (net 278 "Net-(C52-Pad1)") + (net 279 "Net-(C58-Pad1)") + (net 280 "Net-(J8-Pad3)") + (net 281 "Net-(J8-Pad4)") + (net 282 "Net-(J8-Pad1)") + (net 283 "Net-(J8-Pad2)") + (net 284 "Net-(J9-Pad3)") + (net 285 "Net-(J9-Pad2)") + (net 286 "Net-(J10-Pad5)") + (net 287 "Net-(J10-Pad6)") + (net 288 "Net-(J10-Pad7)") + (net 289 "Net-(J10-Pad8)") + (net 290 CHG_SDA) + (net 291 CHG_SCL) + (net 292 "Net-(R70-Pad2)") + (net 293 "Net-(R72-Pad2)") + (net 294 "/Reform 2 Power/LPC_SCK1b") + (net 295 "/Reform 2 Power/LPC_MISO1b") + (net 296 "/Reform 2 Power/LPC_MOSI1b") + (net 297 "/Reform 2 Power/LPC_SSEL1") + (net 298 "Net-(R77-Pad2)") + (net 299 "/Reform 2 Power/LPC_UFTOGG") + (net 300 USB2_TX_N) + (net 301 USB2_TX_P) + (net 302 "Net-(U18-Pad48)") + (net 303 "/Reform 2 Power/LPC_TXDa") + (net 304 "/Reform 2 Power/LPC_RXDa") + (net 305 "/Reform 2 Power/LPC_SCLKa") + (net 306 "/Reform 2 Power/LPC_SCK1a") + (net 307 "/Reform 2 Power/LPC_AD7") + (net 308 "/Reform 2 Power/LPC_AD5") + (net 309 "/Reform 2 Power/LPC_SWDIO") + (net 310 "/Reform 2 Power/LPC_RXDb") + (net 311 "/Reform 2 Power/LPC_TXDb") + (net 312 "/Reform 2 Power/LPC_TRST") + (net 313 "/Reform 2 Power/LPC_TDO") + (net 314 "/Reform 2 Power/LPC_TMS") + (net 315 "/Reform 2 Power/LPC_TDI") + (net 316 "/Reform 2 Power/LPC_SCK0b") + (net 317 "/Reform 2 Power/LPC_MISO1a") + (net 318 "/Reform 2 Power/LPC_SCK0a") + (net 319 "/Reform 2 Power/LPC_MOSI0") + (net 320 "/Reform 2 Power/LPC_MISO0") + (net 321 "Net-(U18-Pad25)") + (net 322 "/Reform 2 Power/LPC_SCLKc") + (net 323 "/Reform 2 Power/LPC_NCTS") + (net 324 "/Reform 2 Power/LPC_NUSBCON") + (net 325 "/Reform 2 Power/LPC_SCLKb") + (net 326 "/Reform 2 Power/LPC_MOSI1a") + (net 327 "/Reform 2 Power/LPC_UVBUS") + (net 328 "/Reform 2 Power/LPC_TXDc") + (net 329 "/Reform 2 Power/LPC_RXDc") + (net 330 "/Reform 2 Power/LPC_SSEL0") + (net 331 "Net-(U18-Pad9)") + (net 332 "/Reform 2 Power/LPC_NRESET") + (net 333 "/Reform 2 Power/LPC_NDTR") + (net 334 "Net-(U18-Pad1)") + (net 335 "Net-(J10-Pad69)") + (net 336 "Net-(J10-Pad67)") + (net 337 "Net-(J10-Pad58)") + (net 338 "Net-(J10-Pad56)") + (net 339 "Net-(J10-Pad48)") + (net 340 "Net-(J10-Pad46)") + (net 341 "Net-(J10-Pad37)") + (net 342 "Net-(J10-Pad36)") + (net 343 "Net-(J10-Pad35)") + (net 344 "Net-(J10-Pad34)") + (net 345 "Net-(J10-Pad32)") + (net 346 "Net-(J10-Pad31)") + (net 347 "Net-(J10-Pad30)") + (net 348 "Net-(J10-Pad29)") + (net 349 "Net-(J10-Pad28)") + (net 350 "Net-(J10-Pad26)") + (net 351 "Net-(J10-Pad25)") + (net 352 "Net-(J10-Pad24)") + (net 353 "Net-(J10-Pad23)") + (net 354 "Net-(J10-Pad22)") + (net 355 "Net-(J10-Pad20)") + (net 356 "Net-(J10-Pad11)") + (net 357 BAT1+) + (net 358 BAT2+) + (net 359 BAT3+) + (net 360 BAT4+) + (net 361 BAT5+) + (net 362 BAT6+) + (net 363 BAT7+) + (net 364 BAT8+) + (net 365 "Net-(J14-Pad3)") + (net 366 "Net-(J14-Pad2)") + (net 367 +1V5) + (net 368 "Net-(C80-Pad2)") + (net 369 "Net-(C82-Pad2)") + (net 370 "Net-(D23-Pad2)") + (net 371 "Net-(D23-Pad1)") + (net 372 "Net-(C90-Pad1)") + (net 373 "Net-(C69-Pad1)") + (net 374 "Net-(C71-Pad1)") + (net 375 USB3_3_VBUS) + (net 376 "Net-(C72-Pad1)") + (net 377 USB3_4_VBUS) + (net 378 "Net-(C81-Pad1)") + (net 379 "Net-(C83-Pad1)") + (net 380 "Net-(C74-Pad1)") + (net 381 "Net-(C67-Pad1)") + (net 382 "Net-(J10-Pad68)") + (net 383 "Net-(J10-Pad54)") + (net 384 "Net-(C121-Pad1)") + (net 385 "Net-(C122-Pad1)") + (net 386 "/Reform 2 PCIe/M2_SMB_ALERTn") + (net 387 "/Reform 2 PCIe/M2_SMB_DATA") + (net 388 "/Reform 2 PCIe/M2_SMB_CLK") + (net 389 "Net-(J10-Pad38)") + (net 390 "Net-(C75-Pad1)") + (net 391 "Net-(J17-Pad1)") + (net 392 "Net-(R56-Pad1)") + (net 393 "Net-(R78-Pad1)") + (net 394 "Net-(R79-Pad1)") + (net 395 "Net-(R80-Pad1)") + (net 396 "Net-(R103-Pad1)") + (net 397 USB3_2_OVERCURn) + (net 398 USB3_1_OVERCURn) + (net 399 USB3_3_OVERCURn) + (net 400 USB3_4_OVERCURn) + (net 401 "Net-(R102-Pad2)") + (net 402 "Net-(U9-Pad38)") + (net 403 "Net-(U9-Pad37)") + (net 404 "Net-(C105-Pad2)") + (net 405 "Net-(C108-Pad2)") + (net 406 "Net-(C106-Pad2)") + (net 407 "Net-(C109-Pad2)") + (net 408 "Net-(C107-Pad2)") + (net 409 "Net-(C110-Pad2)") + (net 410 PCIE_WDISn) + (net 411 "Net-(R88-Pad1)") + (net 412 "Net-(R87-Pad1)") + (net 413 "Net-(R89-Pad1)") + (net 414 "Net-(R83-Pad2)") + (net 415 "Net-(R82-Pad1)") + (net 416 "Net-(R100-Pad1)") + (net 417 "Net-(R99-Pad1)") + (net 418 "Net-(R101-Pad1)") + (net 419 "Net-(R95-Pad2)") + (net 420 "Net-(R94-Pad1)") + (net 421 "Net-(C126-Pad1)") + (net 422 "Net-(C128-Pad2)") + (net 423 "Net-(C128-Pad1)") + (net 424 "Net-(C141-Pad2)") + (net 425 "Net-(C145-Pad2)") + (net 426 "Net-(C145-Pad1)") + (net 427 "Net-(C147-Pad2)") + (net 428 "Net-(C147-Pad1)") + (net 429 "Net-(C148-Pad2)") + (net 430 "Net-(C148-Pad1)") + (net 431 "Net-(C149-Pad2)") + (net 432 "Net-(C149-Pad1)") + (net 433 "Net-(C150-Pad1)") + (net 434 "Net-(C153-Pad2)") + (net 435 "Net-(C153-Pad1)") + (net 436 "Net-(C156-Pad1)") + (net 437 "Net-(C158-Pad2)") + (net 438 "Net-(C158-Pad1)") + (net 439 "Net-(C159-Pad2)") + (net 440 "Net-(C159-Pad1)") + (net 441 IMX_UART1_RX) + (net 442 IMX_UART1_TX) + (net 443 IMX_UART2_RX) + (net 444 IMX_UART2_TX) + (net 445 "Net-(J21-Pad3)") + (net 446 "Net-(J21-Pad1)") + (net 447 USB_RESETn) + (net 448 "Net-(J10-Pad13)") + (net 449 "Net-(R111-Pad2)") + (net 450 "Net-(R113-Pad1)") + (net 451 IMX_RESETn) + (net 452 IMX_ONOFF) + (net 453 IMX_JTAG_TMS) + (net 454 IMX_JTAG_TDI) + (net 455 IMX_JTAG_RSTn) + (net 456 IMX_JTAG_TCK) + (net 457 "Net-(R123-Pad2)") + (net 458 LPC_MISO) + (net 459 LPC_MOSI) + (net 460 LPC_SCK) + (net 461 "Net-(R129-Pad1)") + (net 462 "Net-(R130-Pad1)") + (net 463 BACKLIGHT_PWM) + (net 464 BACKLIGHT_EN) + (net 465 DAC_SCL) + (net 466 DAC_SDA) + (net 467 "Net-(R137-Pad2)") + (net 468 DAC_MCLK) + (net 469 "Net-(R138-Pad1)") + (net 470 "Net-(R139-Pad2)") + (net 471 "Net-(R139-Pad1)") + (net 472 "Net-(R140-Pad1)") + (net 473 "Net-(R141-Pad1)") + (net 474 "Net-(U1-Pad194)") + (net 475 "Net-(U1-Pad192)") + (net 476 "Net-(U1-Pad162)") + (net 477 "Net-(U1-Pad152)") + (net 478 "Net-(U1-Pad148)") + (net 479 "Net-(U1-Pad146)") + (net 480 "Net-(U1-Pad144)") + (net 481 "Net-(U1-Pad142)") + (net 482 "Net-(U1-Pad140)") + (net 483 "Net-(U1-Pad138)") + (net 484 "Net-(U1-Pad136)") + (net 485 "Net-(U1-Pad134)") + (net 486 "Net-(U1-Pad130)") + (net 487 "Net-(U1-Pad128)") + (net 488 "Net-(U1-Pad126)") + (net 489 "Net-(U1-Pad124)") + (net 490 "Net-(U1-Pad122)") + (net 491 "Net-(U1-Pad120)") + (net 492 "Net-(U1-Pad118)") + (net 493 "Net-(U1-Pad116)") + (net 494 "Net-(U1-Pad112)") + (net 495 "Net-(U1-Pad110)") + (net 496 "Net-(U1-Pad108)") + (net 497 "Net-(U1-Pad106)") + (net 498 "Net-(U1-Pad104)") + (net 499 "Net-(U1-Pad102)") + (net 500 "Net-(U1-Pad100)") + (net 501 "Net-(U1-Pad98)") + (net 502 "Net-(U1-Pad94)") + (net 503 "Net-(U1-Pad92)") + (net 504 "Net-(U1-Pad76)") + (net 505 "Net-(U1-Pad74)") + (net 506 "Net-(U1-Pad62)") + (net 507 "Net-(U1-Pad60)") + (net 508 "Net-(U1-Pad52)") + (net 509 "Net-(U1-Pad2)") + (net 510 "Net-(U1-Pad195)") + (net 511 "Net-(U1-Pad193)") + (net 512 "Net-(U1-Pad187)") + (net 513 "Net-(U1-Pad183)") + (net 514 "Net-(U1-Pad163)") + (net 515 "Net-(U1-Pad161)") + (net 516 "Net-(U1-Pad157)") + (net 517 "Net-(U1-Pad155)") + (net 518 "Net-(U1-Pad153)") + (net 519 "Net-(U1-Pad151)") + (net 520 "Net-(U1-Pad149)") + (net 521 "Net-(U1-Pad147)") + (net 522 "Net-(U1-Pad145)") + (net 523 "Net-(U1-Pad143)") + (net 524 "Net-(U1-Pad139)") + (net 525 "Net-(U1-Pad137)") + (net 526 "Net-(U1-Pad135)") + (net 527 "Net-(U1-Pad129)") + (net 528 "Net-(U1-Pad115)") + (net 529 "Net-(U1-Pad113)") + (net 530 "Net-(U1-Pad109)") + (net 531 "Net-(U1-Pad107)") + (net 532 "Net-(U1-Pad103)") + (net 533 "Net-(U1-Pad101)") + (net 534 "Net-(U1-Pad99)") + (net 535 "Net-(U1-Pad97)") + (net 536 "Net-(U1-Pad95)") + (net 537 "Net-(U1-Pad93)") + (net 538 "Net-(U1-Pad91)") + (net 539 "Net-(U1-Pad89)") + (net 540 "Net-(U1-Pad85)") + (net 541 "Net-(U1-Pad83)") + (net 542 "Net-(U1-Pad81)") + (net 543 "Net-(U1-Pad79)") + (net 544 "Net-(U1-Pad77)") + (net 545 "Net-(U1-Pad69)") + (net 546 "Net-(U1-Pad65)") + (net 547 "Net-(U1-Pad29)") + (net 548 "Net-(U1-Pad27)") + (net 549 "Net-(U1-Pad23)") + (net 550 "Net-(U1-Pad21)") + (net 551 "Net-(U1-Pad17)") + (net 552 "Net-(U1-Pad9)") + (net 553 "Net-(U1-Pad7)") + (net 554 RTC_CLKOUT) + (net 555 "Net-(U8-Pad2)") + (net 556 "Net-(U8-Pad1)") + (net 557 "Net-(U20-Pad26)") + (net 558 "Net-(U20-Pad20)") + (net 559 "Net-(U20-Pad19)") + (net 560 DAC_RXFS) + (net 561 DAC_DIN) + (net 562 DAC_DOUT) + (net 563 DAC_BCLK) + (net 564 "Net-(U21-Pad8)") + (net 565 "Net-(U21-Pad6)") + (net 566 "Net-(U21-Pad5)") + (net 567 "Net-(C86-Pad1)") + (net 568 PCIE2_CLKREQn) + (net 569 USB2_RX_P) + (net 570 USB2_RX_N) + (net 571 USB2_DP) + (net 572 USB2_DN) + (net 573 "Net-(TP8-Pad1)") + (net 574 "Net-(TP7-Pad1)") + (net 575 "Net-(TP6-Pad1)") + (net 576 "Net-(TP9-Pad1)") + (net 577 IMX_JTAG_TDO) + (net 578 "Net-(TP4-Pad1)") + (net 579 SD2_WP) + (net 580 PCIE1_CLKREQn) + (net 581 ETH0_LED_LINK1) + (net 582 ETH0_LED_LINK2) + (net 583 "Net-(R112-Pad1)") + (net 584 "Net-(R114-Pad2)") + (net 585 "Net-(SW3-Pad2)") (net_class Default "This is the default net class." (clearance 0.2) @@ -814,12 +698,10 @@ (add_net +1V8) (add_net +36V) (add_net +3V3) - (add_net +5V) (add_net "/Reform 2 Display/EDP_BL_ENABLE") (add_net "/Reform 2 Display/EDP_BL_PWM") (add_net "/Reform 2 Display/EDP_HPD") (add_net "/Reform 2 Display/EDP_LCD_TEST") - (add_net "/Reform 2 PCIe/M2_CLKREQn") (add_net "/Reform 2 PCIe/M2_SMB_ALERTn") (add_net "/Reform 2 PCIe/M2_SMB_CLK") (add_net "/Reform 2 PCIe/M2_SMB_DATA") @@ -882,7 +764,6 @@ (add_net DAC_RXFS) (add_net DAC_SCL) (add_net DAC_SDA) - (add_net DAC_TXFS) (add_net DSI_CLK_N) (add_net DSI_CLK_P) (add_net DSI_D0_N) @@ -911,7 +792,8 @@ (add_net ETH0_C-) (add_net ETH0_D+) (add_net ETH0_D-) - (add_net ETH0_LED_LINK) + (add_net ETH0_LED_LINK1) + (add_net ETH0_LED_LINK2) (add_net ETH0_LED_RX) (add_net GND) (add_net HDMI_CEC) @@ -929,9 +811,9 @@ (add_net IMX_JTAG_RSTn) (add_net IMX_JTAG_TCK) (add_net IMX_JTAG_TDI) + (add_net IMX_JTAG_TDO) (add_net IMX_JTAG_TMS) (add_net IMX_ONOFF) - (add_net IMX_POR_B) (add_net IMX_RESETn) (add_net IMX_UART1_RX) (add_net IMX_UART1_TX) @@ -1094,7 +976,6 @@ (add_net "Net-(J9-Pad2)") (add_net "Net-(J9-Pad3)") (add_net "Net-(L1-Pad2)") - (add_net "Net-(P1-Pad15)") (add_net "Net-(Q1-Pad4)") (add_net "Net-(Q1-Pad5)") (add_net "Net-(Q10-Pad1)") @@ -1112,8 +993,9 @@ (add_net "Net-(R102-Pad2)") (add_net "Net-(R103-Pad1)") (add_net "Net-(R111-Pad2)") - (add_net "Net-(R112-Pad2)") + (add_net "Net-(R112-Pad1)") (add_net "Net-(R113-Pad1)") + (add_net "Net-(R114-Pad2)") (add_net "Net-(R123-Pad2)") (add_net "Net-(R129-Pad1)") (add_net "Net-(R130-Pad1)") @@ -1162,56 +1044,41 @@ (add_net "Net-(R94-Pad1)") (add_net "Net-(R95-Pad2)") (add_net "Net-(R99-Pad1)") - (add_net "Net-(SW4-Pad3)") - (add_net "Net-(SW4-Pad4)") - (add_net "Net-(U1-Pad1)") - (add_net "Net-(U1-Pad10)") + (add_net "Net-(SW3-Pad2)") + (add_net "Net-(TP4-Pad1)") + (add_net "Net-(TP6-Pad1)") + (add_net "Net-(TP7-Pad1)") + (add_net "Net-(TP8-Pad1)") + (add_net "Net-(TP9-Pad1)") (add_net "Net-(U1-Pad100)") (add_net "Net-(U1-Pad101)") (add_net "Net-(U1-Pad102)") (add_net "Net-(U1-Pad103)") (add_net "Net-(U1-Pad104)") - (add_net "Net-(U1-Pad105)") (add_net "Net-(U1-Pad106)") (add_net "Net-(U1-Pad107)") (add_net "Net-(U1-Pad108)") (add_net "Net-(U1-Pad109)") - (add_net "Net-(U1-Pad11)") (add_net "Net-(U1-Pad110)") - (add_net "Net-(U1-Pad111)") (add_net "Net-(U1-Pad112)") (add_net "Net-(U1-Pad113)") - (add_net "Net-(U1-Pad114)") (add_net "Net-(U1-Pad115)") (add_net "Net-(U1-Pad116)") - (add_net "Net-(U1-Pad117)") (add_net "Net-(U1-Pad118)") - (add_net "Net-(U1-Pad119)") - (add_net "Net-(U1-Pad12)") (add_net "Net-(U1-Pad120)") - (add_net "Net-(U1-Pad121)") (add_net "Net-(U1-Pad122)") - (add_net "Net-(U1-Pad123)") (add_net "Net-(U1-Pad124)") - (add_net "Net-(U1-Pad125)") (add_net "Net-(U1-Pad126)") - (add_net "Net-(U1-Pad127)") (add_net "Net-(U1-Pad128)") (add_net "Net-(U1-Pad129)") - (add_net "Net-(U1-Pad13)") (add_net "Net-(U1-Pad130)") - (add_net "Net-(U1-Pad131)") - (add_net "Net-(U1-Pad132)") - (add_net "Net-(U1-Pad133)") (add_net "Net-(U1-Pad134)") (add_net "Net-(U1-Pad135)") (add_net "Net-(U1-Pad136)") (add_net "Net-(U1-Pad137)") (add_net "Net-(U1-Pad138)") (add_net "Net-(U1-Pad139)") - (add_net "Net-(U1-Pad14)") (add_net "Net-(U1-Pad140)") - (add_net "Net-(U1-Pad141)") (add_net "Net-(U1-Pad142)") (add_net "Net-(U1-Pad143)") (add_net "Net-(U1-Pad144)") @@ -1220,149 +1087,46 @@ (add_net "Net-(U1-Pad147)") (add_net "Net-(U1-Pad148)") (add_net "Net-(U1-Pad149)") - (add_net "Net-(U1-Pad15)") - (add_net "Net-(U1-Pad150)") (add_net "Net-(U1-Pad151)") (add_net "Net-(U1-Pad152)") (add_net "Net-(U1-Pad153)") - (add_net "Net-(U1-Pad154)") (add_net "Net-(U1-Pad155)") - (add_net "Net-(U1-Pad156)") (add_net "Net-(U1-Pad157)") - (add_net "Net-(U1-Pad158)") - (add_net "Net-(U1-Pad159)") - (add_net "Net-(U1-Pad16)") - (add_net "Net-(U1-Pad160)") (add_net "Net-(U1-Pad161)") (add_net "Net-(U1-Pad162)") (add_net "Net-(U1-Pad163)") - (add_net "Net-(U1-Pad164)") - (add_net "Net-(U1-Pad165)") - (add_net "Net-(U1-Pad166)") - (add_net "Net-(U1-Pad167)") - (add_net "Net-(U1-Pad168)") - (add_net "Net-(U1-Pad169)") (add_net "Net-(U1-Pad17)") - (add_net "Net-(U1-Pad170)") - (add_net "Net-(U1-Pad171)") - (add_net "Net-(U1-Pad172)") - (add_net "Net-(U1-Pad173)") - (add_net "Net-(U1-Pad174)") - (add_net "Net-(U1-Pad175)") - (add_net "Net-(U1-Pad176)") - (add_net "Net-(U1-Pad177)") - (add_net "Net-(U1-Pad178)") - (add_net "Net-(U1-Pad179)") - (add_net "Net-(U1-Pad18)") - (add_net "Net-(U1-Pad180)") - (add_net "Net-(U1-Pad181)") - (add_net "Net-(U1-Pad182)") (add_net "Net-(U1-Pad183)") - (add_net "Net-(U1-Pad184)") - (add_net "Net-(U1-Pad185)") - (add_net "Net-(U1-Pad186)") (add_net "Net-(U1-Pad187)") - (add_net "Net-(U1-Pad188)") - (add_net "Net-(U1-Pad189)") - (add_net "Net-(U1-Pad19)") - (add_net "Net-(U1-Pad190)") - (add_net "Net-(U1-Pad191)") (add_net "Net-(U1-Pad192)") (add_net "Net-(U1-Pad193)") (add_net "Net-(U1-Pad194)") (add_net "Net-(U1-Pad195)") - (add_net "Net-(U1-Pad196)") - (add_net "Net-(U1-Pad197)") - (add_net "Net-(U1-Pad198)") (add_net "Net-(U1-Pad2)") - (add_net "Net-(U1-Pad20)") - (add_net "Net-(U1-Pad200)") - (add_net "Net-(U1-Pad201)") - (add_net "Net-(U1-Pad202)") - (add_net "Net-(U1-Pad203)") - (add_net "Net-(U1-Pad204)") (add_net "Net-(U1-Pad21)") - (add_net "Net-(U1-Pad22)") (add_net "Net-(U1-Pad23)") - (add_net "Net-(U1-Pad24)") - (add_net "Net-(U1-Pad25)") - (add_net "Net-(U1-Pad26)") (add_net "Net-(U1-Pad27)") - (add_net "Net-(U1-Pad28)") (add_net "Net-(U1-Pad29)") - (add_net "Net-(U1-Pad3)") - (add_net "Net-(U1-Pad30)") - (add_net "Net-(U1-Pad31)") - (add_net "Net-(U1-Pad32)") - (add_net "Net-(U1-Pad33)") - (add_net "Net-(U1-Pad34)") - (add_net "Net-(U1-Pad35)") - (add_net "Net-(U1-Pad36)") - (add_net "Net-(U1-Pad37)") - (add_net "Net-(U1-Pad38)") - (add_net "Net-(U1-Pad39)") - (add_net "Net-(U1-Pad4)") - (add_net "Net-(U1-Pad40)") - (add_net "Net-(U1-Pad41)") - (add_net "Net-(U1-Pad42)") - (add_net "Net-(U1-Pad43)") - (add_net "Net-(U1-Pad44)") - (add_net "Net-(U1-Pad45)") - (add_net "Net-(U1-Pad46)") - (add_net "Net-(U1-Pad47)") - (add_net "Net-(U1-Pad48)") - (add_net "Net-(U1-Pad49)") - (add_net "Net-(U1-Pad5)") - (add_net "Net-(U1-Pad50)") - (add_net "Net-(U1-Pad51)") (add_net "Net-(U1-Pad52)") - (add_net "Net-(U1-Pad53)") - (add_net "Net-(U1-Pad54)") - (add_net "Net-(U1-Pad55)") - (add_net "Net-(U1-Pad56)") - (add_net "Net-(U1-Pad57)") - (add_net "Net-(U1-Pad58)") - (add_net "Net-(U1-Pad59)") - (add_net "Net-(U1-Pad6)") (add_net "Net-(U1-Pad60)") - (add_net "Net-(U1-Pad61)") (add_net "Net-(U1-Pad62)") - (add_net "Net-(U1-Pad64)") (add_net "Net-(U1-Pad65)") - (add_net "Net-(U1-Pad66)") - (add_net "Net-(U1-Pad67)") - (add_net "Net-(U1-Pad68)") (add_net "Net-(U1-Pad69)") (add_net "Net-(U1-Pad7)") - (add_net "Net-(U1-Pad70)") - (add_net "Net-(U1-Pad71)") - (add_net "Net-(U1-Pad72)") - (add_net "Net-(U1-Pad73)") (add_net "Net-(U1-Pad74)") - (add_net "Net-(U1-Pad75)") (add_net "Net-(U1-Pad76)") (add_net "Net-(U1-Pad77)") - (add_net "Net-(U1-Pad78)") (add_net "Net-(U1-Pad79)") - (add_net "Net-(U1-Pad8)") - (add_net "Net-(U1-Pad80)") (add_net "Net-(U1-Pad81)") - (add_net "Net-(U1-Pad82)") (add_net "Net-(U1-Pad83)") - (add_net "Net-(U1-Pad84)") (add_net "Net-(U1-Pad85)") - (add_net "Net-(U1-Pad86)") - (add_net "Net-(U1-Pad87)") - (add_net "Net-(U1-Pad88)") (add_net "Net-(U1-Pad89)") (add_net "Net-(U1-Pad9)") - (add_net "Net-(U1-Pad90)") (add_net "Net-(U1-Pad91)") (add_net "Net-(U1-Pad92)") (add_net "Net-(U1-Pad93)") (add_net "Net-(U1-Pad94)") (add_net "Net-(U1-Pad95)") - (add_net "Net-(U1-Pad96)") (add_net "Net-(U1-Pad97)") (add_net "Net-(U1-Pad98)") (add_net "Net-(U1-Pad99)") @@ -1406,7 +1170,6 @@ (add_net "Net-(U11-Pad49)") (add_net "Net-(U11-Pad5)") (add_net "Net-(U11-Pad51)") - (add_net "Net-(U11-Pad7)") (add_net "Net-(U11-Pad8)") (add_net "Net-(U12-Pad5)") (add_net "Net-(U12-Pad7)") @@ -1439,12 +1202,14 @@ (add_net "Net-(U9-Pad38)") (add_net "Net-(U9-Pad39)") (add_net "Net-(U9-Pad60)") + (add_net PCIE1_CLKREQn) (add_net PCIE1_CLK_N) (add_net PCIE1_CLK_P) (add_net PCIE1_RX_N) (add_net PCIE1_RX_P) (add_net PCIE1_TX_N) (add_net PCIE1_TX_P) + (add_net PCIE2_CLKREQn) (add_net PCIE2_CLK_N) (add_net PCIE2_CLK_P) (add_net PCIE2_RX_N) @@ -1454,8 +1219,6 @@ (add_net PCIE_RESETn) (add_net PCIE_WDISn) (add_net RTC_CLKOUT) - (add_net RTC_SCL) - (add_net RTC_SDA) (add_net SD2_CD) (add_net SD2_CLK) (add_net SD2_CMD) @@ -1463,12 +1226,17 @@ (add_net SD2_DATA1) (add_net SD2_DATA2) (add_net SD2_DATA3) + (add_net SD2_WP) (add_net USB1_DN) (add_net USB1_DP) (add_net USB1_RX_N) (add_net USB1_RX_P) (add_net USB1_TX_N) (add_net USB1_TX_P) + (add_net USB2_DN) + (add_net USB2_DP) + (add_net USB2_RX_N) + (add_net USB2_RX_P) (add_net USB2_TX_N) (add_net USB2_TX_P) (add_net USB3_1_DN) @@ -1511,11 +1279,218 @@ (add_net USB_RESETn) ) + (module TestPoint:TestPoint_Pad_1.0x1.0mm (layer F.Cu) (tedit 5A0F774F) (tstamp 5D263AC3) + (at 123.63 152.27) + (descr "SMD rectangular pad as test Point, square 1.0mm side length") + (tags "test point SMD pad rectangle square") + (path /5DC3EE9C) + (attr virtual) + (fp_text reference TP9 (at 0 -1.448) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value T_SD2_RESET (at 0 1.55) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1 1) (end -1 1) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1 1) (end 1 -1) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1 -1) (end -1 1) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1 -1) (end 1 -1) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.7 0.7) (end -0.7 -0.7) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.7 0.7) (end -0.7 0.7) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.7 -0.7) (end 0.7 0.7) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.7 -0.7) (end 0.7 -0.7) (layer F.SilkS) (width 0.12)) + (fp_text user %R (at 0 -1.45) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 smd rect (at 0 0) (size 1 1) (layers F.Cu F.Mask) + (net 576 "Net-(TP9-Pad1)")) + ) + + (module TestPoint:TestPoint_Pad_1.0x1.0mm (layer F.Cu) (tedit 5A0F774F) (tstamp 5D263AB5) + (at 120.58 155.32) + (descr "SMD rectangular pad as test Point, square 1.0mm side length") + (tags "test point SMD pad rectangle square") + (path /5DBAB563) + (attr virtual) + (fp_text reference TP8 (at 0 -1.448) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value T_PMIC_ON_REQ (at 0 1.55) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1 1) (end -1 1) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1 1) (end 1 -1) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1 -1) (end -1 1) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1 -1) (end 1 -1) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.7 0.7) (end -0.7 -0.7) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.7 0.7) (end -0.7 0.7) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.7 -0.7) (end 0.7 0.7) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.7 -0.7) (end 0.7 -0.7) (layer F.SilkS) (width 0.12)) + (fp_text user %R (at 0 -1.45) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 smd rect (at 0 0) (size 1 1) (layers F.Cu F.Mask) + (net 573 "Net-(TP8-Pad1)")) + ) + + (module TestPoint:TestPoint_Pad_1.0x1.0mm (layer F.Cu) (tedit 5A0F774F) (tstamp 5D263AA7) + (at 120.58 152.27) + (descr "SMD rectangular pad as test Point, square 1.0mm side length") + (tags "test point SMD pad rectangle square") + (path /5DE7A63E) + (attr virtual) + (fp_text reference TP7 (at 0 -1.448) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value T_PWM3 (at 0 1.55) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1 1) (end -1 1) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1 1) (end 1 -1) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1 -1) (end -1 1) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1 -1) (end 1 -1) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.7 0.7) (end -0.7 -0.7) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.7 0.7) (end -0.7 0.7) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.7 -0.7) (end 0.7 0.7) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.7 -0.7) (end 0.7 -0.7) (layer F.SilkS) (width 0.12)) + (fp_text user %R (at 0 -1.45) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 smd rect (at 0 0) (size 1 1) (layers F.Cu F.Mask) + (net 574 "Net-(TP7-Pad1)")) + ) + + (module TestPoint:TestPoint_Pad_1.0x1.0mm (layer F.Cu) (tedit 5A0F774F) (tstamp 5D263A99) + (at 117.53 155.32) + (descr "SMD rectangular pad as test Point, square 1.0mm side length") + (tags "test point SMD pad rectangle square") + (path /5DBBBAE9) + (attr virtual) + (fp_text reference TP6 (at 0 -1.448) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value T_USB1_ID (at 0 1.55) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1 1) (end -1 1) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1 1) (end 1 -1) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1 -1) (end -1 1) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1 -1) (end 1 -1) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.7 0.7) (end -0.7 -0.7) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.7 0.7) (end -0.7 0.7) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.7 -0.7) (end 0.7 0.7) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.7 -0.7) (end 0.7 -0.7) (layer F.SilkS) (width 0.12)) + (fp_text user %R (at 0 -1.45) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 smd rect (at 0 0) (size 1 1) (layers F.Cu F.Mask) + (net 575 "Net-(TP6-Pad1)")) + ) + + (module TestPoint:TestPoint_Pad_1.0x1.0mm (layer F.Cu) (tedit 5A0F774F) (tstamp 5D263A71) + (at 117.53 152.27) + (descr "SMD rectangular pad as test Point, square 1.0mm side length") + (tags "test point SMD pad rectangle square") + (path /5DC50C6F) + (attr virtual) + (fp_text reference TP4 (at 0 -1.448) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value T_JTAG_MOD (at 0 1.55) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1 1) (end -1 1) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1 1) (end 1 -1) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1 -1) (end -1 1) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1 -1) (end 1 -1) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.7 0.7) (end -0.7 -0.7) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.7 0.7) (end -0.7 0.7) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.7 -0.7) (end 0.7 0.7) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.7 -0.7) (end 0.7 -0.7) (layer F.SilkS) (width 0.12)) + (fp_text user %R (at 0 -1.45) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 smd rect (at 0 0) (size 1 1) (layers F.Cu F.Mask) + (net 578 "Net-(TP4-Pad1)")) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5D263527) + (at 114 154.51) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5E367CB7) + (attr smd) + (fp_text reference R112 (at 0 -1.43) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 10k (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 23 +3V3)) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 583 "Net-(R112-Pad1)")) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5D263516) + (at 114 152) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5DC1E478) + (attr smd) + (fp_text reference R111 (at 0 -1.43) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 0 (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 449 "Net-(R111-Pad2)")) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 197 USB_PWR)) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + (module Connector_USB:USB3_A_Molex_48393-001 (layer F.Cu) (tedit 5A142044) (tstamp 5D290C81) (at 50.5 71.5 270) (descr "USB 3.0, type A, right angle (http://www.molex.com/pdm_docs/sd/483930003_sd.pdf)") (tags "USB 3.0 type A right angle") - (path /5D06A2FD/5DA00825) + (path /5D06A2FD/5DA0C9AF) (fp_text reference J17 (at 3.5 -3.6 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) @@ -1542,31 +1517,31 @@ (fp_line (start 10.4 11.75) (end -3.4 11.75) (layer F.Fab) (width 0.1)) (fp_line (start -3.4 -2.5) (end 10.4 -2.5) (layer F.Fab) (width 0.1)) (pad 1 thru_hole circle (at 0 0 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) - (net 377 "Net-(C69-Pad1)")) + (net 391 "Net-(J17-Pad1)")) (pad 2 thru_hole circle (at 2.5 0 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) - (net 220 USB3_1_DN)) + (net 572 USB2_DN)) (pad 3 thru_hole circle (at 4.5 0 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) - (net 219 USB3_1_DP)) + (net 571 USB2_DP)) (pad 4 thru_hole circle (at 7 0 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) (net 15 GND)) (pad 5 thru_hole circle (at 7.5 -1.5 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) - (net 218 USB3_1_SSRXN)) + (net 570 USB2_RX_N)) (pad 6 thru_hole circle (at 5.5 -1.5 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) - (net 217 USB3_1_SSRXP)) + (net 569 USB2_RX_P)) (pad 7 thru_hole circle (at 3.5 -1.5 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) (net 15 GND)) (pad 8 thru_hole circle (at 1.5 -1.5 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) - (net 195 "Net-(C40-Pad2)")) + (net 368 "Net-(C80-Pad2)")) (pad 9 thru_hole circle (at -0.5 -1.5 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) - (net 199 "Net-(C42-Pad2)")) + (net 369 "Net-(C82-Pad2)")) (pad 10 thru_hole oval (at 9.9 -0.75 270) (size 1.2 2.4) (drill oval 0.6 1.7) (layers *.Cu *.Mask) - (net 385 "Net-(C67-Pad1)")) + (net 390 "Net-(C75-Pad1)")) (pad 10 thru_hole oval (at -2.9 -0.75 270) (size 1.2 2.4) (drill oval 0.6 1.7) (layers *.Cu *.Mask) - (net 385 "Net-(C67-Pad1)")) + (net 390 "Net-(C75-Pad1)")) (pad 10 thru_hole oval (at 9.9 7.75 270) (size 1.2 2.1) (drill oval 0.6 1.4) (layers *.Cu *.Mask) - (net 385 "Net-(C67-Pad1)")) + (net 390 "Net-(C75-Pad1)")) (pad 10 thru_hole oval (at -2.9 7.75 270) (size 1.2 2.1) (drill oval 0.6 1.4) (layers *.Cu *.Mask) - (net 385 "Net-(C67-Pad1)")) + (net 390 "Net-(C75-Pad1)")) (model ${KIPRJMOD}/3d-models/483930001.stp (offset (xyz 3.5 -11.65 0.25)) (scale (xyz 1 1 1)) @@ -1607,7 +1582,7 @@ (pad 3 smd rect (at -3.15 2.3) (size 2 1.5) (layers F.Cu F.Paste F.Mask) (net 23 +3V3)) (pad 2 smd rect (at -3.15 0) (size 2 1.5) (layers F.Cu F.Paste F.Mask) - (net 371 +1V5)) + (net 367 +1V5)) (pad 4 smd rect (at 3.15 0) (size 2 3.8) (layers F.Cu F.Paste F.Mask)) (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-223.wrl (at (xyz 0 0 0)) @@ -1649,7 +1624,7 @@ (pad 3 smd rect (at -3.15 2.3) (size 2 1.5) (layers F.Cu F.Paste F.Mask) (net 23 +3V3)) (pad 2 smd rect (at -3.15 0) (size 2 1.5) (layers F.Cu F.Paste F.Mask) - (net 242 +1V8)) + (net 238 +1V8)) (pad 4 smd rect (at 3.15 0) (size 2 3.8) (layers F.Cu F.Paste F.Mask)) (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-223.wrl (at (xyz 0 0 0)) @@ -1658,122 +1633,6 @@ ) ) - (module Button_Switch_SMD:SW_DIP_SPSTx02_Slide_6.7x6.64mm_W8.61mm_P2.54mm_LowProfile (layer F.Cu) (tedit 5A4E1404) (tstamp 5D26681E) - (at 63.5 165.105) - (descr "SMD 2x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x6.64mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile") - (tags "SMD DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile") - (path /5DC76CE0) - (attr smd) - (fp_text reference SW4 (at 0 -4.38) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value SW_DIP_x02 (at 0 4.38) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text user on (at 0.4275 -2.6125) (layer F.Fab) - (effects (font (size 0.8 0.8) (thickness 0.12))) - ) - (fp_text user %R (at 2.58 0 90) (layer F.Fab) - (effects (font (size 0.8 0.8) (thickness 0.12))) - ) - (fp_line (start 5.8 -3.65) (end -5.8 -3.65) (layer F.CrtYd) (width 0.05)) - (fp_line (start 5.8 3.65) (end 5.8 -3.65) (layer F.CrtYd) (width 0.05)) - (fp_line (start -5.8 3.65) (end 5.8 3.65) (layer F.CrtYd) (width 0.05)) - (fp_line (start -5.8 -3.65) (end -5.8 3.65) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.603333 0.635) (end -0.603333 1.905) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.81 1.835) (end -0.603333 1.835) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.81 1.715) (end -0.603333 1.715) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.81 1.595) (end -0.603333 1.595) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.81 1.475) (end -0.603333 1.475) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.81 1.355) (end -0.603333 1.355) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.81 1.235) (end -0.603333 1.235) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.81 1.115) (end -0.603333 1.115) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.81 0.995) (end -0.603333 0.995) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.81 0.875) (end -0.603333 0.875) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.81 0.755) (end -0.603333 0.755) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.81 0.635) (end -1.81 0.635) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.81 1.905) (end 1.81 0.635) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.81 1.905) (end 1.81 1.905) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.81 0.635) (end -1.81 1.905) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.603333 -1.905) (end -0.603333 -0.635) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.81 -0.705) (end -0.603333 -0.705) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.81 -0.825) (end -0.603333 -0.825) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.81 -0.945) (end -0.603333 -0.945) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.81 -1.065) (end -0.603333 -1.065) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.81 -1.185) (end -0.603333 -1.185) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.81 -1.305) (end -0.603333 -1.305) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.81 -1.425) (end -0.603333 -1.425) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.81 -1.545) (end -0.603333 -1.545) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.81 -1.665) (end -0.603333 -1.665) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.81 -1.785) (end -0.603333 -1.785) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.81 -1.905) (end -1.81 -1.905) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.81 -0.635) (end 1.81 -1.905) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.81 -0.635) (end 1.81 -0.635) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.81 -1.905) (end -1.81 -0.635) (layer F.SilkS) (width 0.12)) - (fp_line (start -3.65 -3.62) (end -3.65 -2.237) (layer F.SilkS) (width 0.12)) - (fp_line (start -3.65 -3.62) (end -2.267 -3.62) (layer F.SilkS) (width 0.12)) - (fp_line (start 3.41 -0.47) (end 3.41 0.47) (layer F.SilkS) (width 0.12)) - (fp_line (start 3.41 -3.38) (end 3.41 -2.07) (layer F.SilkS) (width 0.12)) - (fp_line (start 3.41 2.07) (end 3.41 3.38) (layer F.SilkS) (width 0.12)) - (fp_line (start -3.41 2.07) (end -3.41 3.38) (layer F.SilkS) (width 0.12)) - (fp_line (start -3.41 -0.47) (end -3.41 0.47) (layer F.SilkS) (width 0.12)) - (fp_line (start -3.41 -3.38) (end -3.41 -2.07) (layer F.SilkS) (width 0.12)) - (fp_line (start -3.41 3.38) (end 3.41 3.38) (layer F.SilkS) (width 0.12)) - (fp_line (start -3.41 -3.38) (end 3.41 -3.38) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.603333 0.635) (end -0.603333 1.905) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 1.835) (end -0.603333 1.835) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 1.735) (end -0.603333 1.735) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 1.635) (end -0.603333 1.635) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 1.535) (end -0.603333 1.535) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 1.435) (end -0.603333 1.435) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 1.335) (end -0.603333 1.335) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 1.235) (end -0.603333 1.235) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 1.135) (end -0.603333 1.135) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 1.035) (end -0.603333 1.035) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 0.935) (end -0.603333 0.935) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 0.835) (end -0.603333 0.835) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 0.735) (end -0.603333 0.735) (layer F.Fab) (width 0.1)) - (fp_line (start 1.81 0.635) (end -1.81 0.635) (layer F.Fab) (width 0.1)) - (fp_line (start 1.81 1.905) (end 1.81 0.635) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 1.905) (end 1.81 1.905) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 0.635) (end -1.81 1.905) (layer F.Fab) (width 0.1)) - (fp_line (start -0.603333 -1.905) (end -0.603333 -0.635) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 -0.705) (end -0.603333 -0.705) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 -0.805) (end -0.603333 -0.805) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 -0.905) (end -0.603333 -0.905) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 -1.005) (end -0.603333 -1.005) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 -1.105) (end -0.603333 -1.105) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 -1.205) (end -0.603333 -1.205) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 -1.305) (end -0.603333 -1.305) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 -1.405) (end -0.603333 -1.405) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 -1.505) (end -0.603333 -1.505) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 -1.605) (end -0.603333 -1.605) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 -1.705) (end -0.603333 -1.705) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 -1.805) (end -0.603333 -1.805) (layer F.Fab) (width 0.1)) - (fp_line (start 1.81 -1.905) (end -1.81 -1.905) (layer F.Fab) (width 0.1)) - (fp_line (start 1.81 -0.635) (end 1.81 -1.905) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 -0.635) (end 1.81 -0.635) (layer F.Fab) (width 0.1)) - (fp_line (start -1.81 -1.905) (end -1.81 -0.635) (layer F.Fab) (width 0.1)) - (fp_line (start -3.35 -2.32) (end -2.35 -3.32) (layer F.Fab) (width 0.1)) - (fp_line (start -3.35 3.32) (end -3.35 -2.32) (layer F.Fab) (width 0.1)) - (fp_line (start 3.35 3.32) (end -3.35 3.32) (layer F.Fab) (width 0.1)) - (fp_line (start 3.35 -3.32) (end 3.35 3.32) (layer F.Fab) (width 0.1)) - (fp_line (start -2.35 -3.32) (end 3.35 -3.32) (layer F.Fab) (width 0.1)) - (pad 4 smd rect (at 4.305 -1.27) (size 2.44 1.12) (layers F.Cu F.Paste F.Mask) - (net 699 "Net-(SW4-Pad4)")) - (pad 2 smd rect (at -4.305 1.27) (size 2.44 1.12) (layers F.Cu F.Paste F.Mask) - (net 454 "Net-(R111-Pad2)")) - (pad 3 smd rect (at 4.305 1.27) (size 2.44 1.12) (layers F.Cu F.Paste F.Mask) - (net 700 "Net-(SW4-Pad3)")) - (pad 1 smd rect (at -4.305 -1.27) (size 2.44 1.12) (layers F.Cu F.Paste F.Mask) - (net 455 "Net-(R112-Pad2)")) - (model ${KISYS3DMOD}/Button_Switch_SMD.3dshapes/SW_DIP_SPSTx02_Slide_6.7x6.64mm_W8.61mm_P2.54mm_LowProfile.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 90)) - ) - ) - (module Button_Switch_SMD:SW_DIP_SPSTx01_Slide_6.7x4.1mm_W8.61mm_P2.54mm_LowProfile (layer F.Cu) (tedit 5A4E1404) (tstamp 5D2667C1) (at 63.5 158 180) (descr "SMD 1x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x4.1mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile") @@ -1842,9 +1701,9 @@ (fp_line (start 3.35 -2.05) (end 3.35 2.05) (layer F.Fab) (width 0.1)) (fp_line (start -2.35 -2.05) (end 3.35 -2.05) (layer F.Fab) (width 0.1)) (pad 2 smd rect (at 4.305 0 180) (size 2.44 1.12) (layers F.Cu F.Paste F.Mask) - (net 456 "Net-(R113-Pad1)")) + (net 585 "Net-(SW3-Pad2)")) (pad 1 smd rect (at -4.305 0 180) (size 2.44 1.12) (layers F.Cu F.Paste F.Mask) - (net 15 GND)) + (net 450 "Net-(R113-Pad1)")) (model ${KISYS3DMOD}/Button_Switch_SMD.3dshapes/SW_DIP_SPSTx01_Slide_6.7x4.1mm_W8.61mm_P2.54mm_LowProfile.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1883,7 +1742,7 @@ (fp_circle (center -3.023 -5) (end -2.943 -5) (layer F.SilkS) (width 0.2)) (fp_circle (center -1.423 -4.2) (end -1.243 -4.2) (layer F.SilkS) (width 0.25)) (pad 1 smd rect (at -2.88 -4.5 180) (size 1.56 0.26) (layers F.Cu F.Paste F.Mask) - (net 24 +5V)) + (net 197 USB_PWR)) (pad 2 smd rect (at -2.88 -4 180) (size 1.56 0.26) (layers F.Cu F.Paste F.Mask) (net 23 +3V3)) (pad 3 smd rect (at -2.88 -3.5 180) (size 1.56 0.26) (layers F.Cu F.Paste F.Mask) @@ -1913,21 +1772,21 @@ (pad 15 smd rect (at -2.88 2.5 180) (size 1.56 0.26) (layers F.Cu F.Paste F.Mask) (net 2 HDMI_D3-)) (pad 16 smd rect (at -2.88 3 180) (size 1.56 0.26) (layers F.Cu F.Paste F.Mask) - (net 185 HDMI_CEC)) + (net 181 HDMI_CEC)) (pad 17 smd rect (at -2.88 3.5 180) (size 1.56 0.26) (layers F.Cu F.Paste F.Mask) - (net 110 HDMI_SCL)) + (net 107 HDMI_SCL)) (pad 18 smd rect (at -2.88 4 180) (size 1.56 0.26) (layers F.Cu F.Paste F.Mask) - (net 186 HDMI_SDA)) + (net 182 HDMI_SDA)) (pad 19 smd rect (at -2.88 4.5 180) (size 1.56 0.26) (layers F.Cu F.Paste F.Mask) - (net 109 HDMI_HPD)) + (net 106 HDMI_HPD)) (pad 20 smd rect (at 2.88 4.5) (size 1.56 0.26) (layers F.Cu F.Paste F.Mask) - (net 73 "Net-(J4-Pad19)")) + (net 72 "Net-(J4-Pad19)")) (pad 21 smd rect (at 2.88 4) (size 1.56 0.26) (layers F.Cu F.Paste F.Mask) - (net 71 "Net-(J4-Pad16)")) + (net 70 "Net-(J4-Pad16)")) (pad 22 smd rect (at 2.88 3.5) (size 1.56 0.26) (layers F.Cu F.Paste F.Mask) - (net 74 "Net-(J4-Pad15)")) + (net 73 "Net-(J4-Pad15)")) (pad 23 smd rect (at 2.88 3) (size 1.56 0.26) (layers F.Cu F.Paste F.Mask) - (net 75 "Net-(J4-Pad13)")) + (net 74 "Net-(J4-Pad13)")) (pad 24 smd rect (at 2.88 2.5) (size 1.56 0.26) (layers F.Cu F.Paste F.Mask) (net 2 HDMI_D3-)) (pad 25 smd rect (at 2.88 2) (size 1.56 0.26) (layers F.Cu F.Paste F.Mask) @@ -1955,9 +1814,9 @@ (pad 36 smd rect (at 2.88 -3.5) (size 1.56 0.26) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 37 smd rect (at 2.88 -4) (size 1.56 0.26) (layers F.Cu F.Paste F.Mask) - (net 31 "Net-(C27-Pad2)")) + (net 30 "Net-(C27-Pad2)")) (pad 38 smd rect (at 2.88 -4.5) (size 1.56 0.26) (layers F.Cu F.Paste F.Mask) - (net 32 "Net-(C30-Pad1)")) + (net 31 "Net-(C30-Pad1)")) ) (module Crystal:Crystal_SMD_2012-2Pin_2.0x1.2mm (layer F.Cu) (tedit 5A0FD1B2) (tstamp 5D244272) @@ -1992,9 +1851,9 @@ (effects (font (size 0.5 0.5) (thickness 0.075))) ) (pad 2 smd rect (at 0.7 0 90) (size 0.6 1.1) (layers F.Cu F.Paste F.Mask) - (net 687 "Net-(U8-Pad1)")) + (net 556 "Net-(U8-Pad1)")) (pad 1 smd rect (at -0.7 0 90) (size 0.6 1.1) (layers F.Cu F.Paste F.Mask) - (net 686 "Net-(U8-Pad2)")) + (net 555 "Net-(U8-Pad2)")) (model ${KISYS3DMOD}/Crystal.3dshapes/Crystal_SMD_2012-2Pin_2.0x1.2mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2034,35 +1893,35 @@ (fp_line (start 2.61 -2.61) (end 2.61 -1.61) (layer F.SilkS) (width 0.12)) (fp_line (start 1.61 -2.61) (end 2.61 -2.61) (layer F.SilkS) (width 0.12)) (pad 16 smd roundrect (at -1.2 -2.4375 90) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 440 "Net-(C153-Pad1)")) + (net 435 "Net-(C153-Pad1)")) (pad 15 smd roundrect (at -0.4 -2.4375 90) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 437 "Net-(C149-Pad1)")) + (net 432 "Net-(C149-Pad1)")) (pad 14 smd roundrect (at 0.4 -2.4375 90) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 24 +5V)) + (net 197 USB_PWR)) (pad 13 smd roundrect (at 1.2 -2.4375 90) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 441 "Net-(C156-Pad1)")) + (net 436 "Net-(C156-Pad1)")) (pad 12 smd roundrect (at 2.4375 -1.2 90) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 11 smd roundrect (at 2.4375 -0.4 90) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 444 "Net-(C159-Pad2)")) + (net 439 "Net-(C159-Pad2)")) (pad 10 smd roundrect (at 2.4375 0.4 90) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 451 "Net-(J21-Pad1)")) + (net 446 "Net-(J21-Pad1)")) (pad 9 smd roundrect (at 2.4375 1.2 90) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 24 +5V)) + (net 197 USB_PWR)) (pad 8 smd roundrect (at 1.2 2.4375 90) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 696 "Net-(U21-Pad8)")) + (net 564 "Net-(U21-Pad8)")) (pad 7 smd roundrect (at 0.4 2.4375 90) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 6 smd roundrect (at -0.4 2.4375 90) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 697 "Net-(U21-Pad6)")) + (net 565 "Net-(U21-Pad6)")) (pad 5 smd roundrect (at -1.2 2.4375 90) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 698 "Net-(U21-Pad5)")) + (net 566 "Net-(U21-Pad5)")) (pad 4 smd roundrect (at -2.4375 1.2 90) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 24 +5V)) + (net 197 USB_PWR)) (pad 3 smd roundrect (at -2.4375 0.4 90) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 450 "Net-(J21-Pad3)")) + (net 445 "Net-(J21-Pad3)")) (pad 2 smd roundrect (at -2.4375 -0.4 90) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 442 "Net-(C158-Pad2)")) + (net 437 "Net-(C158-Pad2)")) (pad 1 smd roundrect (at -2.4375 -1.2 90) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad "" smd roundrect (at 0.775 0.775 90) (size 1.25 1.25) (layers F.Paste) (roundrect_rratio 0.2)) @@ -2112,57 +1971,57 @@ (pad 28 smd rect (at 3.6 -4.225) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 27 smd rect (at 3.6 -3.575) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) - (net 429 "Net-(C141-Pad2)")) + (net 424 "Net-(C141-Pad2)")) (pad 26 smd rect (at 3.6 -2.925) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) - (net 688 "Net-(U20-Pad26)")) + (net 557 "Net-(U20-Pad26)")) (pad 25 smd rect (at 3.6 -2.275) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) - (net 478 "Net-(R138-Pad1)")) + (net 469 "Net-(R138-Pad1)")) (pad 24 smd rect (at 3.6 -1.625) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) - (net 474 DAC_SCL)) + (net 465 DAC_SCL)) (pad 23 smd rect (at 3.6 -0.975) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) - (net 475 DAC_SDA)) + (net 466 DAC_SDA)) (pad 22 smd rect (at 3.6 -0.325) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) - (net 476 "Net-(R137-Pad2)")) + (net 467 "Net-(R137-Pad2)")) (pad 21 smd rect (at 3.6 0.325) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) - (net 476 "Net-(R137-Pad2)")) + (net 467 "Net-(R137-Pad2)")) (pad 20 smd rect (at 3.6 0.975) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) - (net 689 "Net-(U20-Pad20)")) + (net 558 "Net-(U20-Pad20)")) (pad 19 smd rect (at 3.6 1.625) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) - (net 690 "Net-(U20-Pad19)")) + (net 559 "Net-(U20-Pad19)")) (pad 18 smd rect (at 3.6 2.275) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) - (net 482 "Net-(R141-Pad1)")) + (net 473 "Net-(R141-Pad1)")) (pad 17 smd rect (at 3.6 2.925) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) - (net 481 "Net-(R140-Pad1)")) + (net 472 "Net-(R140-Pad1)")) (pad 16 smd rect (at 3.6 3.575) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) - (net 438 "Net-(C150-Pad1)")) + (net 433 "Net-(C150-Pad1)")) (pad 15 smd rect (at 3.6 4.225) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 14 smd rect (at -3.6 4.225) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) (net 23 +3V3)) (pad 13 smd rect (at -3.6 3.575) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) - (net 436 "Net-(C149-Pad2)")) + (net 431 "Net-(C149-Pad2)")) (pad 12 smd rect (at -3.6 2.925) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) - (net 439 "Net-(C153-Pad2)")) + (net 434 "Net-(C153-Pad2)")) (pad 11 smd rect (at -3.6 2.275) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 10 smd rect (at -3.6 1.625) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) - (net 435 "Net-(C148-Pad1)")) + (net 430 "Net-(C148-Pad1)")) (pad 9 smd rect (at -3.6 0.975) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) - (net 431 "Net-(C145-Pad1)")) + (net 426 "Net-(C145-Pad1)")) (pad 8 smd rect (at -3.6 0.325) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) (net 23 +3V3)) (pad 7 smd rect (at -3.6 -0.325) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) - (net 691 DAC_RXFS)) + (net 560 DAC_RXFS)) (pad 6 smd rect (at -3.6 -0.975) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) - (net 692 DAC_DIN)) + (net 561 DAC_DIN)) (pad 5 smd rect (at -3.6 -1.625) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) - (net 693 DAC_TXFS)) + (net 560 DAC_RXFS)) (pad 4 smd rect (at -3.6 -2.275) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) - (net 694 DAC_DOUT)) + (net 562 DAC_DOUT)) (pad 3 smd rect (at -3.6 -2.925) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) - (net 695 DAC_BCLK)) + (net 563 DAC_BCLK)) (pad 2 smd rect (at -3.6 -3.575) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) - (net 480 "Net-(R139-Pad1)")) + (net 471 "Net-(R139-Pad1)")) (pad 1 smd rect (at -3.6 -4.225) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) (net 23 +3V3)) (model ${KISYS3DMOD}/Package_SO.3dshapes/SSOP-28_5.3x10.2mm_P0.65mm.wrl @@ -2233,19 +2092,19 @@ (pad 8 smd rect (at 3.375 0 180) (size 9.4 10.8) (layers F.Cu F.Mask) (net 15 GND)) (pad 7 smd rect (at -5.775 3.81 180) (size 4.6 0.8) (layers F.Cu F.Paste F.Mask) - (net 184 "Net-(U12-Pad7)")) + (net 180 "Net-(U12-Pad7)")) (pad 6 smd rect (at -5.775 2.54 180) (size 4.6 0.8) (layers F.Cu F.Paste F.Mask) (net 23 +3V3)) (pad 5 smd rect (at -5.775 1.27 180) (size 4.6 0.8) (layers F.Cu F.Paste F.Mask) - (net 183 "Net-(U12-Pad5)")) + (net 179 "Net-(U12-Pad5)")) (pad 4 smd rect (at -5.775 0 180) (size 4.6 0.8) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 3 smd rect (at -5.775 -1.27 180) (size 4.6 0.8) (layers F.Cu F.Paste F.Mask) - (net 427 "Net-(C128-Pad2)")) + (net 422 "Net-(C128-Pad2)")) (pad 2 smd rect (at -5.775 -2.54 180) (size 4.6 0.8) (layers F.Cu F.Paste F.Mask) - (net 426 "Net-(C126-Pad1)")) + (net 421 "Net-(C126-Pad1)")) (pad 1 smd rect (at -5.775 -3.81 180) (size 4.6 0.8) (layers F.Cu F.Paste F.Mask) - (net 428 "Net-(C128-Pad1)")) + (net 423 "Net-(C128-Pad1)")) (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/TO-263-7_TabPin8.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2282,21 +2141,21 @@ (fp_line (start 0 2.56) (end -1.95 2.56) (layer F.SilkS) (width 0.12)) (fp_line (start 0 2.56) (end 1.95 2.56) (layer F.SilkS) (width 0.12)) (pad 8 smd roundrect (at 2.475 -1.905) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 242 +1V8)) + (net 238 +1V8)) (pad 7 smd roundrect (at 2.475 -0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 685 RTC_CLKOUT)) + (net 554 RTC_CLKOUT)) (pad 6 smd roundrect (at 2.475 0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 464 RTC_SCL)) + (net 465 DAC_SCL)) (pad 5 smd roundrect (at 2.475 1.905) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 465 RTC_SDA)) + (net 466 DAC_SDA)) (pad 4 smd roundrect (at -2.475 1.905) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 3 smd roundrect (at -2.475 0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 466 "Net-(R123-Pad2)")) + (net 457 "Net-(R123-Pad2)")) (pad 2 smd roundrect (at -2.475 -0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 686 "Net-(U8-Pad2)")) + (net 555 "Net-(U8-Pad2)")) (pad 1 smd roundrect (at -2.475 -1.905) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 687 "Net-(U8-Pad1)")) + (net 556 "Net-(U8-Pad1)")) (model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-8_3.9x4.9mm_P1.27mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2469,411 +2328,413 @@ (pad SH2 smd rect (at 12 32.8) (size 4.6 3.5) (layers F.Cu F.Paste F.Mask)) (pad SH1 smd rect (at 12 -32.8) (size 4.6 3.5) (layers F.Cu F.Paste F.Mask)) (pad 204 smd rect (at 4.1 31.65) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 483 "Net-(U1-Pad204)")) + (net 23 +3V3)) (pad 202 smd rect (at 4.1 31.05) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 484 "Net-(U1-Pad202)")) + (net 573 "Net-(TP8-Pad1)")) (pad 200 smd rect (at 4.1 30.45) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 485 "Net-(U1-Pad200)")) + (net 463 BACKLIGHT_PWM)) (pad 198 smd rect (at 4.1 29.85) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 486 "Net-(U1-Pad198)")) + (net 464 BACKLIGHT_EN)) (pad 196 smd rect (at 4.1 29.25) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 487 "Net-(U1-Pad196)")) + (net 574 "Net-(TP7-Pad1)")) (pad 194 smd rect (at 4.1 28.65) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 488 "Net-(U1-Pad194)")) + (net 474 "Net-(U1-Pad194)")) (pad 192 smd rect (at 4.1 28.05) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 489 "Net-(U1-Pad192)")) + (net 475 "Net-(U1-Pad192)")) (pad 190 smd rect (at 4.1 27.45) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 490 "Net-(U1-Pad190)")) + (net 120 USB1_TX_N)) (pad 188 smd rect (at 4.1 26.85) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 491 "Net-(U1-Pad188)")) + (net 121 USB1_TX_P)) (pad 186 smd rect (at 4.1 26.25) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 492 "Net-(U1-Pad186)")) + (net 23 +3V3)) (pad 184 smd rect (at 4.1 25.65) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 493 "Net-(U1-Pad184)")) + (net 118 USB1_RX_N)) (pad 182 smd rect (at 4.1 25.05) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 494 "Net-(U1-Pad182)")) + (net 119 USB1_RX_P)) (pad 180 smd rect (at 4.1 24.45) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 495 "Net-(U1-Pad180)")) + (net 584 "Net-(R114-Pad2)")) (pad 178 smd rect (at 4.1 23.85) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 496 "Net-(U1-Pad178)")) + (net 122 USB1_DN)) (pad 176 smd rect (at 4.1 23.25) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 497 "Net-(U1-Pad176)")) + (net 123 USB1_DP)) (pad 174 smd rect (at 4.1 22.65) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 498 "Net-(U1-Pad174)")) + (net 575 "Net-(TP6-Pad1)")) (pad 172 smd rect (at 4.1 22.05) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 499 "Net-(U1-Pad172)")) + (net 571 USB2_DP)) (pad 170 smd rect (at 4.1 21.45) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 500 "Net-(U1-Pad170)")) + (net 572 USB2_DN)) (pad 168 smd rect (at 4.1 20.85) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 501 "Net-(U1-Pad168)")) + (net 23 +3V3)) (pad 166 smd rect (at 4.1 20.25) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 502 "Net-(U1-Pad166)")) + (net 300 USB2_TX_N)) (pad 164 smd rect (at 4.1 19.65) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 503 "Net-(U1-Pad164)")) + (net 301 USB2_TX_P)) (pad 162 smd rect (at 4.1 19.05) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 504 "Net-(U1-Pad162)")) + (net 476 "Net-(U1-Pad162)")) (pad 160 smd rect (at 4.1 18.45) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 505 "Net-(U1-Pad160)")) + (net 570 USB2_RX_N)) (pad 158 smd rect (at 4.1 17.85) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 506 "Net-(U1-Pad158)")) + (net 569 USB2_RX_P)) (pad 156 smd rect (at 4.1 17.25) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 507 "Net-(U1-Pad156)")) + (net 449 "Net-(R111-Pad2)")) (pad 154 smd rect (at 4.1 16.65) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 508 "Net-(U1-Pad154)")) + (net 576 "Net-(TP9-Pad1)")) (pad 152 smd rect (at 4.1 16.05) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 509 "Net-(U1-Pad152)")) + (net 477 "Net-(U1-Pad152)")) (pad 150 smd rect (at 4.1 15.45) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 510 "Net-(U1-Pad150)")) + (net 23 +3V3)) (pad 148 smd rect (at 4.1 14.85) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 511 "Net-(U1-Pad148)")) + (net 478 "Net-(U1-Pad148)")) (pad 146 smd rect (at 4.1 14.25) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 512 "Net-(U1-Pad146)")) + (net 479 "Net-(U1-Pad146)")) (pad 144 smd rect (at 4.1 13.65) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 513 "Net-(U1-Pad144)")) + (net 480 "Net-(U1-Pad144)")) (pad 142 smd rect (at 4.1 13.05) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 514 "Net-(U1-Pad142)")) + (net 481 "Net-(U1-Pad142)")) (pad 140 smd rect (at 4.1 12.45) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 515 "Net-(U1-Pad140)")) + (net 482 "Net-(U1-Pad140)")) (pad 138 smd rect (at 4.1 11.85) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 516 "Net-(U1-Pad138)")) + (net 483 "Net-(U1-Pad138)")) (pad 136 smd rect (at 4.1 11.25) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 517 "Net-(U1-Pad136)")) + (net 484 "Net-(U1-Pad136)")) (pad 134 smd rect (at 4.1 10.65) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 518 "Net-(U1-Pad134)")) + (net 485 "Net-(U1-Pad134)")) (pad 132 smd rect (at 4.1 10.05) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 519 "Net-(U1-Pad132)")) + (net 23 +3V3)) (pad 130 smd rect (at 4.1 9.45) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 520 "Net-(U1-Pad130)")) + (net 486 "Net-(U1-Pad130)")) (pad 128 smd rect (at 4.1 8.85) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 521 "Net-(U1-Pad128)")) + (net 487 "Net-(U1-Pad128)")) (pad 126 smd rect (at 4.1 8.25) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 522 "Net-(U1-Pad126)")) + (net 488 "Net-(U1-Pad126)")) (pad 124 smd rect (at 4.1 7.65) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 523 "Net-(U1-Pad124)")) + (net 489 "Net-(U1-Pad124)")) (pad 122 smd rect (at 4.1 7.05) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 524 "Net-(U1-Pad122)")) + (net 490 "Net-(U1-Pad122)")) (pad 120 smd rect (at 4.1 6.45) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 525 "Net-(U1-Pad120)")) + (net 491 "Net-(U1-Pad120)")) (pad 118 smd rect (at 4.1 5.85) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 526 "Net-(U1-Pad118)")) + (net 492 "Net-(U1-Pad118)")) (pad 116 smd rect (at 4.1 5.25) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 527 "Net-(U1-Pad116)")) + (net 493 "Net-(U1-Pad116)")) (pad 114 smd rect (at 4.1 4.65) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 528 "Net-(U1-Pad114)")) + (net 23 +3V3)) (pad 112 smd rect (at 4.1 4.05) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 529 "Net-(U1-Pad112)")) + (net 494 "Net-(U1-Pad112)")) (pad 110 smd rect (at 4.1 3.45) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 530 "Net-(U1-Pad110)")) + (net 495 "Net-(U1-Pad110)")) (pad 108 smd rect (at 4.1 2.85) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 531 "Net-(U1-Pad108)")) + (net 496 "Net-(U1-Pad108)")) (pad 106 smd rect (at 4.1 2.25) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 532 "Net-(U1-Pad106)")) + (net 497 "Net-(U1-Pad106)")) (pad 104 smd rect (at 4.1 1.65) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 533 "Net-(U1-Pad104)")) + (net 498 "Net-(U1-Pad104)")) (pad 102 smd rect (at 4.1 1.05) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 534 "Net-(U1-Pad102)")) + (net 499 "Net-(U1-Pad102)")) (pad 100 smd rect (at 4.1 0.45) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 535 "Net-(U1-Pad100)")) + (net 500 "Net-(U1-Pad100)")) (pad 98 smd rect (at 4.1 -0.15) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 536 "Net-(U1-Pad98)")) + (net 501 "Net-(U1-Pad98)")) (pad 96 smd rect (at 4.1 -0.75) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 537 "Net-(U1-Pad96)")) + (net 23 +3V3)) (pad 94 smd rect (at 4.1 -1.35) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 538 "Net-(U1-Pad94)")) + (net 502 "Net-(U1-Pad94)")) (pad 92 smd rect (at 4.1 -1.95) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 539 "Net-(U1-Pad92)")) + (net 503 "Net-(U1-Pad92)")) (pad 90 smd rect (at 4.1 -2.55) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 540 "Net-(U1-Pad90)")) + (net 13 SD2_DATA3)) (pad 88 smd rect (at 4.1 -3.15) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 541 "Net-(U1-Pad88)")) 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549 "Net-(U1-Pad72)")) + (net 577 IMX_JTAG_TDO)) (pad 70 smd rect (at 4.1 -10.95) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 550 "Net-(U1-Pad70)")) + (net 454 IMX_JTAG_TDI)) (pad 68 smd rect (at 4.1 -11.55) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 551 "Net-(U1-Pad68)")) + (net 453 IMX_JTAG_TMS)) (pad 66 smd rect (at 4.1 -12.15) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 552 "Net-(U1-Pad66)")) + (net 456 IMX_JTAG_TCK)) (pad 64 smd rect (at 4.1 -12.75) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 553 "Net-(U1-Pad64)")) + (net 23 +3V3)) (pad 62 smd rect (at 4.1 -13.35) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 554 "Net-(U1-Pad62)")) + (net 506 "Net-(U1-Pad62)")) (pad 60 smd rect (at 4.1 -13.95) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 555 "Net-(U1-Pad60)")) + (net 507 "Net-(U1-Pad60)")) (pad 58 smd rect (at 4.1 -14.55) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 556 "Net-(U1-Pad58)")) + (net 444 IMX_UART2_TX)) (pad 56 smd rect (at 4.1 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(at -4.1 -13.05) (size 2 0.35) (layers F.Cu F.Paste F.Mask)) + (net 546 "Net-(U1-Pad65)")) + (pad 63 smd rect (at -4.1 -13.05) (size 2 0.35) (layers F.Cu F.Paste F.Mask) + (net 443 IMX_UART2_RX)) (pad 61 smd rect (at -4.1 -13.65) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 654 "Net-(U1-Pad61)")) + (net 16 SD2_CD)) (pad 59 smd rect (at -4.1 -14.25) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 655 "Net-(U1-Pad59)")) + (net 113 DSI_CLK_P)) (pad 57 smd rect (at -4.1 -14.85) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 656 "Net-(U1-Pad57)")) + (net 112 DSI_CLK_N)) (pad 55 smd rect (at -4.1 -15.45) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 657 "Net-(U1-Pad55)")) + (net 15 GND)) (pad 53 smd rect (at -4.1 -16.05) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 658 "Net-(U1-Pad53)")) + (net 108 DSI_D3_N)) (pad 51 smd rect (at -4.1 -16.65) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 659 "Net-(U1-Pad51)")) + (net 109 DSI_D3_P)) (pad 49 smd rect (at -4.1 -17.25) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 660 "Net-(U1-Pad49)")) + (net 466 DAC_SDA)) (pad 47 smd rect (at -4.1 -17.85) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 661 "Net-(U1-Pad47)")) + (net 114 DSI_D1_N)) (pad 45 smd rect (at -4.1 -18.45) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 662 "Net-(U1-Pad45)")) + (net 115 DSI_D1_P)) (pad 43 smd rect (at -4.1 -19.05) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 663 "Net-(U1-Pad43)")) + (net 465 DAC_SCL)) (pad 41 smd rect (at -4.1 -19.65) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 664 "Net-(U1-Pad41)")) + (net 110 DSI_D0_N)) (pad 39 smd rect (at -4.1 -20.25) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 665 "Net-(U1-Pad39)")) + (net 111 DSI_D0_P)) (pad 37 smd rect (at -4.1 -20.85) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 666 "Net-(U1-Pad37)")) + (net 15 GND)) (pad 35 smd rect (at -4.1 -21.45) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 667 "Net-(U1-Pad35)")) + (net 116 DSI_D2_N)) (pad 33 smd rect (at -4.1 -22.05) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 668 "Net-(U1-Pad33)")) + (net 117 DSI_D2_P)) (pad 31 smd rect (at -4.1 -22.65) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 669 "Net-(U1-Pad31)")) + (net 182 HDMI_SDA)) (pad 29 smd rect (at -4.1 -23.25) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 670 "Net-(U1-Pad29)")) + (net 547 "Net-(U1-Pad29)")) (pad 27 smd rect (at -4.1 -23.85) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 671 "Net-(U1-Pad27)")) + (net 548 "Net-(U1-Pad27)")) (pad 25 smd rect (at -4.1 -24.45) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 672 "Net-(U1-Pad25)")) + (net 107 HDMI_SCL)) (pad 23 smd rect (at -4.1 -25.05) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 673 "Net-(U1-Pad23)")) + (net 549 "Net-(U1-Pad23)")) (pad 21 smd rect (at -4.1 -25.65) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 674 "Net-(U1-Pad21)")) + (net 550 "Net-(U1-Pad21)")) (pad 19 smd rect (at -4.1 -26.25) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 675 "Net-(U1-Pad19)")) + (net 15 GND)) (pad 17 smd rect (at -4.1 -26.85) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 676 "Net-(U1-Pad17)")) + (net 551 "Net-(U1-Pad17)")) (pad 15 smd rect (at -4.1 -27.45) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 677 "Net-(U1-Pad15)")) + (net 458 LPC_MISO)) (pad 13 smd rect (at -4.1 -28.05) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 678 "Net-(U1-Pad13)")) + (net 460 LPC_SCK)) (pad 11 smd rect (at -4.1 -28.65) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 679 "Net-(U1-Pad11)")) + (net 459 LPC_MOSI)) (pad 9 smd rect (at -4.1 -29.25) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 680 "Net-(U1-Pad9)")) + (net 552 "Net-(U1-Pad9)")) (pad 7 smd rect (at -4.1 -29.85) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 681 "Net-(U1-Pad7)")) + (net 553 "Net-(U1-Pad7)")) (pad 5 smd rect (at -4.1 -30.45) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 682 "Net-(U1-Pad5)")) + (net 580 PCIE1_CLKREQn)) (pad 3 smd rect (at -4.1 -31.05) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 683 "Net-(U1-Pad3)")) + (net 568 PCIE2_CLKREQn)) (pad 1 smd rect (at -4.1 -31.65) (size 2 0.35) (layers F.Cu F.Paste F.Mask) - (net 684 "Net-(U1-Pad1)")) + (net 15 GND)) (pad Hole np_thru_hole circle (at 0 33.4) (size 1.1 1.1) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) (pad Hole np_thru_hole circle (at 0 -33.4) (size 1.6 1.6) (drill 1.6) (layers *.Cu *.Mask F.SilkS)) (model ${KIPRJMOD}/3d-models/c-2-2013289-1-b-3d.stp @@ -2907,7 +2768,7 @@ (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 smd rect (at 0 0) (size 1 1) (layers F.Cu F.Mask) - (net 63 "/Reform 2 Display/EDP_LCD_TEST")) + (net 62 "/Reform 2 Display/EDP_LCD_TEST")) ) (module Button_Switch_SMD:SW_Push_1P1T_NO_CK_KMR2 (layer F.Cu) (tedit 5A02FC95) (tstamp 5D2438FE) @@ -2939,11 +2800,11 @@ (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 2.05 0.8 90) (size 0.9 1) (layers F.Cu F.Paste F.Mask) - (net 459 IMX_ONOFF)) + (net 452 IMX_ONOFF)) (pad 1 smd rect (at 2.05 -0.8 90) (size 0.9 1) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 2 smd rect (at -2.05 0.8 90) (size 0.9 1) (layers F.Cu F.Paste F.Mask) - (net 459 IMX_ONOFF)) + (net 452 IMX_ONOFF)) (pad 1 smd rect (at -2.05 -0.8 90) (size 0.9 1) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (model ${KISYS3DMOD}/Button_Switch_SMD.3dshapes/SW_Push_1P1T_NO_CK_KMR2.wrl @@ -2982,54 +2843,11 @@ (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 2.05 0.8 90) (size 0.9 1) (layers F.Cu F.Paste F.Mask) - (net 458 IMX_RESETn)) + (net 451 IMX_RESETn)) (pad 1 smd rect (at 2.05 -0.8 90) (size 0.9 1) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 2 smd rect (at -2.05 0.8 90) (size 0.9 1) (layers F.Cu F.Paste F.Mask) - (net 458 IMX_RESETn)) - (pad 1 smd rect (at -2.05 -0.8 90) (size 0.9 1) (layers F.Cu F.Paste F.Mask) - (net 15 GND)) - (model ${KISYS3DMOD}/Button_Switch_SMD.3dshapes/SW_Push_1P1T_NO_CK_KMR2.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Button_Switch_SMD:SW_Push_1P1T_NO_CK_KMR2 (layer F.Cu) (tedit 5A02FC95) (tstamp 5D2438D2) - (at 28.8 163.09) - (descr "CK components KMR2 tactile switch http://www.ckswitches.com/media/1479/kmr2.pdf") - (tags "tactile switch kmr2") - (path /5E6EC51E) - (attr smd) - (fp_text reference SW5 (at 0 -2.45) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value SW_Push (at 0 2.55) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start -2.2 0.05) (end -2.2 -0.05) (layer F.SilkS) (width 0.12)) - (fp_line (start 2.2 -1.55) (end -2.2 -1.55) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.2 1.55) (end 2.2 1.55) (layer F.SilkS) (width 0.12)) - (fp_circle (center 0 0) (end 0 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -2.8 1.8) (end -2.8 -1.8) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.8 1.8) (end -2.8 1.8) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.8 -1.8) (end 2.8 1.8) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.8 -1.8) (end 2.8 -1.8) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.2 0.05) (end 2.2 -0.05) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.1 1.4) (end -2.1 -1.4) (layer F.Fab) (width 0.1)) - (fp_line (start 2.1 1.4) (end -2.1 1.4) (layer F.Fab) (width 0.1)) - (fp_line (start 2.1 -1.4) (end 2.1 1.4) (layer F.Fab) (width 0.1)) - (fp_line (start -2.1 -1.4) (end 2.1 -1.4) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 -2.45) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (pad 2 smd rect (at 2.05 0.8 90) (size 0.9 1) (layers F.Cu F.Paste F.Mask) - (net 457 IMX_POR_B)) - (pad 1 smd rect (at 2.05 -0.8 90) (size 0.9 1) (layers F.Cu F.Paste F.Mask) - (net 15 GND)) - (pad 2 smd rect (at -2.05 0.8 90) (size 0.9 1) (layers F.Cu F.Paste F.Mask) - (net 457 IMX_POR_B)) + (net 451 IMX_RESETn)) (pad 1 smd rect (at -2.05 -0.8 90) (size 0.9 1) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (model ${KISYS3DMOD}/Button_Switch_SMD.3dshapes/SW_Push_1P1T_NO_CK_KMR2.wrl @@ -3067,7 +2885,7 @@ (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 224 "Net-(J7-Pad4)")) + (net 220 "Net-(J7-Pad4)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3103,7 +2921,7 @@ (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 432 "Net-(C147-Pad2)")) + (net 427 "Net-(C147-Pad2)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3139,7 +2957,7 @@ (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 434 "Net-(C148-Pad2)")) + (net 429 "Net-(C148-Pad2)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3175,7 +2993,7 @@ (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 430 "Net-(C145-Pad2)")) + (net 425 "Net-(C145-Pad2)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3209,9 +3027,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 433 "Net-(C147-Pad1)")) + (net 428 "Net-(C147-Pad1)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 482 "Net-(R141-Pad1)")) + (net 473 "Net-(R141-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3245,9 +3063,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 432 "Net-(C147-Pad2)")) + (net 427 "Net-(C147-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 481 "Net-(R140-Pad1)")) + (net 472 "Net-(R140-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3281,9 +3099,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 479 "Net-(R139-Pad2)")) + (net 470 "Net-(R139-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 480 "Net-(R139-Pad1)")) + (net 471 "Net-(R139-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3317,9 +3135,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 477 DAC_MCLK)) + (net 468 DAC_MCLK)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 478 "Net-(R138-Pad1)")) + (net 469 "Net-(R138-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3353,7 +3171,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 476 "Net-(R137-Pad2)")) + (net 467 "Net-(R137-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl @@ -3389,7 +3207,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 475 DAC_SDA)) + (net 466 DAC_SDA)) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 23 +3V3)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl @@ -3425,7 +3243,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 474 DAC_SCL)) + (net 465 DAC_SCL)) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 23 +3V3)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl @@ -3461,9 +3279,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 473 BACKLIGHT_EN)) + (net 464 BACKLIGHT_EN)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 61 "/Reform 2 Display/EDP_BL_ENABLE")) + (net 60 "/Reform 2 Display/EDP_BL_ENABLE")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3497,9 +3315,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 472 BACKLIGHT_PWM)) + (net 463 BACKLIGHT_PWM)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 60 "/Reform 2 Display/EDP_BL_PWM")) + (net 59 "/Reform 2 Display/EDP_BL_PWM")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3533,9 +3351,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 242 +1V8)) + (net 238 +1V8)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 471 "Net-(R130-Pad1)")) + (net 462 "Net-(R130-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3569,9 +3387,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 242 +1V8)) + (net 238 +1V8)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 470 "Net-(R129-Pad1)")) + (net 461 "Net-(R129-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3605,9 +3423,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 243 EDP_SDA)) + (net 239 EDP_SDA)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 471 "Net-(R130-Pad1)")) + (net 462 "Net-(R130-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3641,9 +3459,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 241 EDP_SCL)) + (net 237 EDP_SCL)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 470 "Net-(R129-Pad1)")) + (net 461 "Net-(R129-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3679,7 +3497,7 @@ (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 23 +3V3)) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 129 BMON_SDO)) + (net 126 BMON_SDO)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3713,7 +3531,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 285 "Net-(J8-Pad4)")) + (net 281 "Net-(J8-Pad4)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl @@ -3749,9 +3567,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 469 LPC_SCK)) + (net 460 LPC_SCK)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 322 "/Reform 2 Power/LPC_SCK0a")) + (net 318 "/Reform 2 Power/LPC_SCK0a")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3785,9 +3603,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 468 LPC_MOSI)) + (net 459 LPC_MOSI)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 323 "/Reform 2 Power/LPC_MOSI0")) + (net 319 "/Reform 2 Power/LPC_MOSI0")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3821,9 +3639,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 467 LPC_MISO)) + (net 458 LPC_MISO)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 324 "/Reform 2 Power/LPC_MISO0")) + (net 320 "/Reform 2 Power/LPC_MISO0")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3857,9 +3675,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 466 "Net-(R123-Pad2)")) + (net 457 "Net-(R123-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 242 +1V8)) + (net 238 +1V8)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3893,9 +3711,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 465 RTC_SDA)) + (net 466 DAC_SDA)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 242 +1V8)) + (net 238 +1V8)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3929,9 +3747,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 464 RTC_SCL)) + (net 465 DAC_SCL)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 242 +1V8)) + (net 238 +1V8)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3967,7 +3785,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 463 IMX_JTAG_TCK)) + (net 456 IMX_JTAG_TCK)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4001,7 +3819,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 462 IMX_JTAG_RSTn)) + (net 455 IMX_JTAG_RSTn)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 23 +3V3)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl @@ -4037,7 +3855,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 461 IMX_JTAG_TDI)) + (net 454 IMX_JTAG_TDI)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 23 +3V3)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl @@ -4073,43 +3891,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 460 IMX_JTAG_TMS)) - (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 23 +3V3)) - (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5D24367B) - (at 42 158.5) - (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") - (tags resistor) - (path /5DC26514) - (attr smd) - (fp_text reference R116 (at 0 -1.43) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 10k (at 0 1.43) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.4 0.4) (thickness 0.06))) - ) - (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) - (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) - (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) - (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) - (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) - (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 459 IMX_ONOFF)) + (net 453 IMX_JTAG_TMS)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 23 +3V3)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl @@ -4145,7 +3927,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 458 IMX_RESETn)) + (net 451 IMX_RESETn)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 23 +3V3)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl @@ -4159,12 +3941,12 @@ (at 29 159) (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") (tags resistor) - (path /5E6EC53E) + (path /5E3A8EBA) (attr smd) (fp_text reference R114 (at 0 -1.43) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value 10k (at 0 1.43) (layer F.Fab) + (fp_text value 0 (at 0 1.43) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 0 0) (layer F.Fab) @@ -4181,9 +3963,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 457 IMX_POR_B)) + (net 584 "Net-(R114-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 23 +3V3)) + (net 197 USB_PWR)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4219,79 +4001,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 23 +3V3)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 456 "Net-(R113-Pad1)")) - (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5D243637) - (at 50.48 165.19) - (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") - (tags resistor) - (path /5DCB70EA) - (attr smd) - (fp_text reference R112 (at 0 -1.43) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 10k (at 0 1.43) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.4 0.4) (thickness 0.06))) - ) - (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) - (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) - (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) - (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) - (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) - (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 455 "Net-(R112-Pad2)")) - (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 23 +3V3)) - (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5D243626) - (at 54.49 165.19) - (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") - (tags resistor) - (path /5DCCBCDE) - (attr smd) - (fp_text reference R111 (at 0 -1.43) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 10k (at 0 1.43) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.4 0.4) (thickness 0.06))) - ) - (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) - (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) - (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) - (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) - (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) - (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 454 "Net-(R111-Pad2)")) - (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 23 +3V3)) + (net 450 "Net-(R113-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4327,7 +4037,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 347 "Net-(J10-Pad35)")) + (net 343 "Net-(J10-Pad35)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4363,7 +4073,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 357 "Net-(J10-Pad23)")) + (net 353 "Net-(J10-Pad23)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4399,7 +4109,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 360 "Net-(J10-Pad11)")) + (net 356 "Net-(J10-Pad11)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4435,7 +4145,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 345 "Net-(J10-Pad37)")) + (net 341 "Net-(J10-Pad37)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4471,7 +4181,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 355 "Net-(J10-Pad25)")) + (net 351 "Net-(J10-Pad25)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4507,7 +4217,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 453 "Net-(J10-Pad13)")) + (net 448 "Net-(J10-Pad13)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4541,9 +4251,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 452 USB_RESETn)) + (net 447 USB_RESETn)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 401 "Net-(R103-Pad1)")) + (net 396 "Net-(R103-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4577,9 +4287,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 406 "Net-(R102-Pad2)")) + (net 401 "Net-(R102-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 701 "Net-(C86-Pad1)")) + (net 567 "Net-(C86-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4613,9 +4323,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 405 USB3_4_OVERCURn)) + (net 400 USB3_4_OVERCURn)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 423 "Net-(R101-Pad1)")) + (net 418 "Net-(R101-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4649,9 +4359,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 404 USB3_3_OVERCURn)) + (net 399 USB3_3_OVERCURn)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 421 "Net-(R100-Pad1)")) + (net 416 "Net-(R100-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4687,7 +4397,7 @@ (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 422 "Net-(R99-Pad1)")) + (net 417 "Net-(R99-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4721,9 +4431,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 396 "Net-(J17-Pad1)")) + (net 391 "Net-(J17-Pad1)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 382 "Net-(C81-Pad1)")) + (net 378 "Net-(C81-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4757,9 +4467,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 424 "Net-(R95-Pad2)")) + (net 419 "Net-(R95-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 262 USB3_4_EN)) + (net 258 USB3_4_EN)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4793,9 +4503,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 261 USB3_3_EN)) + (net 257 USB3_3_EN)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 425 "Net-(R94-Pad1)")) + (net 420 "Net-(R94-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4829,9 +4539,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 370 "Net-(J14-Pad2)")) + (net 366 "Net-(J14-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 267 USB3_4_DN)) + (net 263 USB3_4_DN)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4865,9 +4575,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 289 "Net-(J9-Pad2)")) + (net 285 "Net-(J9-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 273 USB3_3_DN)) + (net 269 USB3_3_DN)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4901,9 +4611,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 369 "Net-(J14-Pad3)")) + (net 365 "Net-(J14-Pad3)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 268 USB3_4_DP)) + (net 264 USB3_4_DP)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4937,9 +4647,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 288 "Net-(J9-Pad3)")) + (net 284 "Net-(J9-Pad3)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 274 USB3_3_DP)) + (net 270 USB3_3_DP)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4973,9 +4683,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 402 USB3_2_OVERCURn)) + (net 397 USB3_2_OVERCURn)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 418 "Net-(R89-Pad1)")) + (net 413 "Net-(R89-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5009,9 +4719,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 403 USB3_1_OVERCURn)) + (net 398 USB3_1_OVERCURn)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 416 "Net-(R88-Pad1)")) + (net 411 "Net-(R88-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5047,7 +4757,7 @@ (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 417 "Net-(R87-Pad1)")) + (net 412 "Net-(R87-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5083,7 +4793,7 @@ (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 23 +3V3)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 403 USB3_1_OVERCURn)) + (net 398 USB3_1_OVERCURn)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5119,7 +4829,7 @@ (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 23 +3V3)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 402 USB3_2_OVERCURn)) + (net 397 USB3_2_OVERCURn)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5155,7 +4865,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 23 +3V3)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 404 USB3_3_OVERCURn)) + (net 399 USB3_3_OVERCURn)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5189,9 +4899,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 419 "Net-(R83-Pad2)")) + (net 414 "Net-(R83-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 260 USB3_2_EN)) + (net 256 USB3_2_EN)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5225,9 +4935,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 259 USB3_1_EN)) + (net 255 USB3_1_EN)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 420 "Net-(R82-Pad1)")) + (net 415 "Net-(R82-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5263,7 +4973,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 23 +3V3)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 405 USB3_4_OVERCURn)) + (net 400 USB3_4_OVERCURn)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5297,9 +5007,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 89 BATPWR)) + (net 86 BATPWR)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 400 "Net-(R80-Pad1)")) + (net 395 "Net-(R80-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5335,7 +5045,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 399 "Net-(R79-Pad1)")) + (net 394 "Net-(R79-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5371,7 +5081,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 398 "Net-(R78-Pad1)")) + (net 393 "Net-(R78-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5405,9 +5115,9 @@ (fp_line (start -0.8 -1.6) (end 0.8 -1.6) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 1.6) (end -0.8 -1.6) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.75 0 90) (size 1 3.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 76 "Net-(L1-Pad2)")) + (net 75 "Net-(L1-Pad2)")) (pad 1 smd roundrect (at -0.75 0 90) (size 1 3.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 89 BATPWR)) + (net 86 BATPWR)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0612_1632Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5441,9 +5151,9 @@ (fp_line (start -0.8 -1.6) (end 0.8 -1.6) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 1.6) (end -0.8 -1.6) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.75 0) (size 1 3.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 190 "Net-(C34-Pad1)")) + (net 186 "Net-(C34-Pad1)")) (pad 1 smd roundrect (at -0.75 0) (size 1 3.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 225 "Net-(Q1-Pad5)")) + (net 221 "Net-(Q1-Pad5)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0612_1632Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5498,7 +5208,7 @@ (pad 1 smd rect (at -4.85 0 270) (size 2.9 5.4) (layers F.Cu F.Paste F.Mask) (net 17 "Net-(C1-Pad2)")) (pad 2 smd rect (at 4.85 0 270) (size 2.9 5.4) (layers F.Cu F.Paste F.Mask) - (net 76 "Net-(L1-Pad2)")) + (net 75 "Net-(L1-Pad2)")) (model ${KISYS3DMOD}/Inductor_SMD.3dshapes/L_Bourns_SRR1260.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5536,13 +5246,13 @@ (fp_line (start 0.635 -1.27) (end 1.27 -0.635) (layer F.Fab) (width 0.1)) (fp_line (start -1.27 -1.27) (end 0.635 -1.27) (layer F.Fab) (width 0.1)) (pad 4 thru_hole oval (at 0 7.62 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 443 "Net-(C158-Pad1)")) + (net 438 "Net-(C158-Pad1)")) (pad 3 thru_hole oval (at 0 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 450 "Net-(J21-Pad3)")) + (net 445 "Net-(J21-Pad3)")) (pad 2 thru_hole oval (at 0 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 445 "Net-(C159-Pad1)")) + (net 440 "Net-(C159-Pad1)")) (pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 451 "Net-(J21-Pad1)")) + (net 446 "Net-(J21-Pad1)")) (model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_1x04_P2.54mm_Vertical.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5582,9 +5292,9 @@ (pad 3 thru_hole oval (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 15 GND)) (pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 448 IMX_UART2_RX)) + (net 443 IMX_UART2_RX)) (pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 449 IMX_UART2_TX)) + (net 444 IMX_UART2_TX)) (model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_1x03_P2.54mm_Vertical.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5624,9 +5334,9 @@ (pad 3 thru_hole oval (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 15 GND)) (pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 446 IMX_UART1_RX)) + (net 441 IMX_UART1_RX)) (pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 447 IMX_UART1_TX)) + (net 442 IMX_UART1_TX)) (model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_1x03_P2.54mm_Vertical.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5666,15 +5376,15 @@ (pad 6 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 15 GND)) (pad 5 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 263 USB3_4_SSRXN)) + (net 259 USB3_4_SSRXN)) (pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 264 USB3_4_SSRXP)) + (net 260 USB3_4_SSRXP)) (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 265 USB3_4_SSTXN)) + (net 261 USB3_4_SSTXN)) (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 266 USB3_4_SSTXP)) + (net 262 USB3_4_SSTXP)) (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 381 USB3_4_VBUS)) + (net 377 USB3_4_VBUS)) (model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_1x06_P2.54mm_Vertical.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5714,15 +5424,15 @@ (pad 6 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 15 GND)) (pad 5 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 269 USB3_3_SSRXN)) + (net 265 USB3_3_SSRXN)) (pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 270 USB3_3_SSRXP)) + (net 266 USB3_3_SSRXP)) (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 271 USB3_3_SSTXN)) + (net 267 USB3_3_SSTXN)) (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 272 USB3_3_SSTXP)) + (net 268 USB3_3_SSTXP)) (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 379 USB3_3_VBUS)) + (net 375 USB3_3_VBUS)) (model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_1x06_P2.54mm_Vertical.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5798,9 +5508,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 444 "Net-(C159-Pad2)")) + (net 439 "Net-(C159-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 445 "Net-(C159-Pad1)")) + (net 440 "Net-(C159-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5834,9 +5544,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 442 "Net-(C158-Pad2)")) + (net 437 "Net-(C158-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 443 "Net-(C158-Pad1)")) + (net 438 "Net-(C158-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5872,7 +5582,7 @@ (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 24 +5V)) + (net 197 USB_PWR)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5908,7 +5618,7 @@ (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 441 "Net-(C156-Pad1)")) + (net 436 "Net-(C156-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5944,7 +5654,7 @@ (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 24 +5V)) + (net 197 USB_PWR)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5980,7 +5690,7 @@ (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 438 "Net-(C150-Pad1)")) + (net 433 "Net-(C150-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -6014,9 +5724,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 439 "Net-(C153-Pad2)")) + (net 434 "Net-(C153-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 440 "Net-(C153-Pad1)")) + (net 435 "Net-(C153-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -6052,7 +5762,7 @@ (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 432 "Net-(C147-Pad2)")) + (net 427 "Net-(C147-Pad2)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -6124,7 +5834,7 @@ (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 438 "Net-(C150-Pad1)")) + (net 433 "Net-(C150-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -6158,9 +5868,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 436 "Net-(C149-Pad2)")) + (net 431 "Net-(C149-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 437 "Net-(C149-Pad1)")) + (net 432 "Net-(C149-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -6217,9 +5927,9 @@ (fp_line (start 4.15 -4.15) (end 4.15 4.15) (layer F.Fab) (width 0.1)) (fp_circle (center 0 0) (end 4 0) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 3.25 0 90) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) - (net 434 "Net-(C148-Pad2)")) + (net 429 "Net-(C148-Pad2)")) (pad 1 smd roundrect (at -3.25 0 90) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) - (net 435 "Net-(C148-Pad1)")) + (net 430 "Net-(C148-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/CP_Elec_8x10.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -6253,9 +5963,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 432 "Net-(C147-Pad2)")) + (net 427 "Net-(C147-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 433 "Net-(C147-Pad1)")) + (net 428 "Net-(C147-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -6348,9 +6058,9 @@ (fp_line (start 4.15 -4.15) (end 4.15 4.15) (layer F.Fab) (width 0.1)) (fp_circle (center 0 0) (end 4 0) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 3.25 0 180) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) - (net 430 "Net-(C145-Pad2)")) + (net 425 "Net-(C145-Pad2)")) (pad 1 smd roundrect (at -3.25 0 180) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) - (net 431 "Net-(C145-Pad1)")) + (net 426 "Net-(C145-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/CP_Elec_8x10.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -6384,7 +6094,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 429 "Net-(C141-Pad2)")) + (net 424 "Net-(C141-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl @@ -6492,7 +6202,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 429 "Net-(C141-Pad2)")) + (net 424 "Net-(C141-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl @@ -6890,7 +6600,7 @@ (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 242 +1V8)) + (net 238 +1V8)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -6960,9 +6670,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 427 "Net-(C128-Pad2)")) + (net 422 "Net-(C128-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 428 "Net-(C128-Pad1)")) + (net 423 "Net-(C128-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -6998,7 +6708,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 426 "Net-(C126-Pad1)")) + (net 421 "Net-(C126-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7034,7 +6744,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 426 "Net-(C126-Pad1)")) + (net 421 "Net-(C126-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7070,7 +6780,7 @@ (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 89 BATPWR)) + (net 86 BATPWR)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7106,7 +6816,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 242 +1V8)) + (net 238 +1V8)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7140,9 +6850,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 251 PCIE2_TX_N)) + (net 247 PCIE2_TX_N)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 390 "Net-(C122-Pad1)")) + (net 385 "Net-(C122-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7176,9 +6886,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 250 PCIE2_TX_P)) + (net 246 PCIE2_TX_P)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 389 "Net-(C121-Pad1)")) + (net 384 "Net-(C121-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7214,7 +6924,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 371 +1V5)) + (net 367 +1V5)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7250,7 +6960,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 371 +1V5)) + (net 367 +1V5)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7286,7 +6996,7 @@ (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 191 +1V2)) + (net 187 +1V2)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7322,7 +7032,7 @@ (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 242 +1V8)) + (net 238 +1V8)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7358,7 +7068,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 191 +1V2)) + (net 187 +1V2)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7394,7 +7104,7 @@ (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 242 +1V8)) + (net 238 +1V8)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7430,7 +7140,7 @@ (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 242 +1V8)) + (net 238 +1V8)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7466,7 +7176,7 @@ (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 191 +1V2)) + (net 187 +1V2)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7502,7 +7212,7 @@ (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 242 +1V8)) + (net 238 +1V8)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7538,7 +7248,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 191 +1V2)) + (net 187 +1V2)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7572,9 +7282,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 414 "Net-(C110-Pad2)")) + (net 409 "Net-(C110-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 65 EDP_AUX_DP)) + (net 64 EDP_AUX_DP)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7608,9 +7318,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 412 "Net-(C109-Pad2)")) + (net 407 "Net-(C109-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 67 EDP_TX0_DP)) + (net 66 EDP_TX0_DP)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7644,9 +7354,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 410 "Net-(C108-Pad2)")) + (net 405 "Net-(C108-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 69 EDP_TX1_DP)) + (net 68 EDP_TX1_DP)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7680,9 +7390,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 413 "Net-(C107-Pad2)")) + (net 408 "Net-(C107-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 64 EDP_AUX_DN)) + (net 63 EDP_AUX_DN)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7716,9 +7426,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 411 "Net-(C106-Pad2)")) + (net 406 "Net-(C106-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 66 EDP_TX0_DN)) + (net 65 EDP_TX0_DN)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7752,9 +7462,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 409 "Net-(C105-Pad2)")) + (net 404 "Net-(C105-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 68 EDP_TX1_DN)) + (net 67 EDP_TX1_DN)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7790,7 +7500,7 @@ (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 191 +1V2)) + (net 187 +1V2)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7826,7 +7536,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 191 +1V2)) + (net 187 +1V2)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7862,7 +7572,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 191 +1V2)) + (net 187 +1V2)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7898,7 +7608,7 @@ (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 191 +1V2)) + (net 187 +1V2)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7934,7 +7644,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 191 +1V2)) + (net 187 +1V2)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7970,7 +7680,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 191 +1V2)) + (net 187 +1V2)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8006,7 +7716,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 376 "Net-(C90-Pad1)")) + (net 372 "Net-(C90-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8042,7 +7752,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 376 "Net-(C90-Pad1)")) + (net 372 "Net-(C90-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8078,7 +7788,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 376 "Net-(C90-Pad1)")) + (net 372 "Net-(C90-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8114,7 +7824,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 376 "Net-(C90-Pad1)")) + (net 372 "Net-(C90-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8150,7 +7860,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 376 "Net-(C90-Pad1)")) + (net 372 "Net-(C90-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8186,7 +7896,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 376 "Net-(C90-Pad1)")) + (net 372 "Net-(C90-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8222,7 +7932,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 376 "Net-(C90-Pad1)")) + (net 372 "Net-(C90-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8258,7 +7968,7 @@ (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 701 "Net-(C86-Pad1)")) + (net 567 "Net-(C86-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8294,7 +8004,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 376 "Net-(C90-Pad1)")) + (net 372 "Net-(C90-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8330,7 +8040,7 @@ (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 701 "Net-(C86-Pad1)")) + (net 567 "Net-(C86-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8366,7 +8076,7 @@ (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 701 "Net-(C86-Pad1)")) + (net 567 "Net-(C86-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8402,7 +8112,7 @@ (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 701 "Net-(C86-Pad1)")) + (net 567 "Net-(C86-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8438,7 +8148,7 @@ (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 701 "Net-(C86-Pad1)")) + (net 567 "Net-(C86-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8474,7 +8184,7 @@ (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 383 "Net-(C83-Pad1)")) + (net 379 "Net-(C83-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8510,7 +8220,7 @@ (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 382 "Net-(C81-Pad1)")) + (net 378 "Net-(C81-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8569,7 +8279,7 @@ (pad 2 smd roundrect (at 3.25 0 90) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) (net 15 GND)) (pad 1 smd roundrect (at -3.25 0 90) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) - (net 383 "Net-(C83-Pad1)")) + (net 379 "Net-(C83-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/CP_Elec_8x10.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8628,7 +8338,7 @@ (pad 2 smd roundrect (at 3.25 0 270) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) (net 15 GND)) (pad 1 smd roundrect (at -3.25 0 270) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) - (net 382 "Net-(C81-Pad1)")) + (net 378 "Net-(C81-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/CP_Elec_8x10.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8664,7 +8374,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 395 "Net-(C75-Pad1)")) + (net 390 "Net-(C75-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8700,7 +8410,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 384 "Net-(C74-Pad1)")) + (net 380 "Net-(C74-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8736,7 +8446,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 380 "Net-(C72-Pad1)")) + (net 376 "Net-(C72-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8772,7 +8482,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 378 "Net-(C71-Pad1)")) + (net 374 "Net-(C71-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8808,7 +8518,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 395 "Net-(C75-Pad1)")) + (net 390 "Net-(C75-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8844,7 +8554,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 384 "Net-(C74-Pad1)")) + (net 380 "Net-(C74-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8880,7 +8590,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 24 +5V)) + (net 197 USB_PWR)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8939,7 +8649,7 @@ (pad 2 smd roundrect (at 3.25 0) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) (net 15 GND)) (pad 1 smd roundrect (at -3.25 0) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) - (net 380 "Net-(C72-Pad1)")) + (net 376 "Net-(C72-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/CP_Elec_8x10.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8998,7 +8708,7 @@ (pad 2 smd roundrect (at 3.25 0 180) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) (net 15 GND)) (pad 1 smd roundrect (at -3.25 0 180) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) - (net 378 "Net-(C71-Pad1)")) + (net 374 "Net-(C71-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/CP_Elec_8x10.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -9034,7 +8744,7 @@ (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 377 "Net-(C69-Pad1)")) + (net 373 "Net-(C69-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -9093,7 +8803,7 @@ (pad 2 smd roundrect (at 3.25 0 90) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) (net 15 GND)) (pad 1 smd roundrect (at -3.25 0 90) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) - (net 377 "Net-(C69-Pad1)")) + (net 373 "Net-(C69-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/CP_Elec_8x10.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -9129,7 +8839,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 385 "Net-(C67-Pad1)")) + (net 381 "Net-(C67-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -9165,7 +8875,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 385 "Net-(C67-Pad1)")) + (net 381 "Net-(C67-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -9201,7 +8911,7 @@ (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 24 +5V)) + (net 197 USB_PWR)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -9260,7 +8970,7 @@ (pad 2 smd roundrect (at 3.25 0 90) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) (net 15 GND)) (pad 1 smd roundrect (at -3.25 0 90) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) - (net 283 "Net-(C58-Pad1)")) + (net 279 "Net-(C58-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/CP_Elec_8x10.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -9319,7 +9029,7 @@ (pad 2 smd roundrect (at 3.25 0 90) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) (net 15 GND)) (pad 1 smd roundrect (at -3.25 0 90) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) - (net 283 "Net-(C58-Pad1)")) + (net 279 "Net-(C58-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/CP_Elec_8x10.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -9378,7 +9088,7 @@ (pad 2 smd roundrect (at 3.25 0 180) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) (net 15 GND)) (pad 1 smd roundrect (at -3.25 0 180) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) - (net 282 "Net-(C52-Pad1)")) + (net 278 "Net-(C52-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/CP_Elec_8x10.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -9437,7 +9147,7 @@ (pad 2 smd roundrect (at 3.25 0 180) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) (net 15 GND)) (pad 1 smd roundrect (at -3.25 0 180) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) - (net 282 "Net-(C52-Pad1)")) + (net 278 "Net-(C52-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/CP_Elec_8x10.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -9555,7 +9265,7 @@ (pad 2 smd roundrect (at 3.25 0 180) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) (net 15 GND)) (pad 1 smd roundrect (at -3.25 0 180) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) - (net 24 +5V)) + (net 197 USB_PWR)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/CP_Elec_8x10.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -9591,7 +9301,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 426 "Net-(C126-Pad1)")) + (net 421 "Net-(C126-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -9650,7 +9360,7 @@ (pad 2 smd roundrect (at 3.25 0 90) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) (net 15 GND)) (pad 1 smd roundrect (at -3.25 0 90) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) - (net 426 "Net-(C126-Pad1)")) + (net 421 "Net-(C126-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/CP_Elec_8x10.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -9709,7 +9419,7 @@ (pad 2 smd roundrect (at 3.25 0 90) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) (net 15 GND)) (pad 1 smd roundrect (at -3.25 0 90) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1) - (net 187 +36V)) + (net 183 +36V)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/CP_Elec_8x10.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -9750,9 +9460,9 @@ (pad 4 smd rect (at -1.1 -0.85) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask)) (pad 3 smd rect (at 1.1 -0.85) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask)) (pad 2 smd rect (at 1.1 0.85) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask) - (net 281 "Net-(C51-Pad1)")) + (net 277 "Net-(C51-Pad1)")) (pad 1 smd rect (at -1.1 0.85) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask) - (net 280 "Net-(C48-Pad1)")) + (net 276 "Net-(C48-Pad1)")) (model ${KISYS3DMOD}/Crystal.3dshapes/Crystal_SMD_Abracon_ABM8G-4Pin_3.2x2.5mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -9793,9 +9503,9 @@ (pad 4 smd rect (at -1.1 -0.85 180) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask)) (pad 3 smd rect (at 1.1 -0.85 180) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask)) (pad 2 smd rect (at 1.1 0.85 180) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask) - (net 26 "Net-(C21-Pad1)")) + (net 25 "Net-(C21-Pad1)")) (pad 1 smd rect (at -1.1 0.85 180) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask) - (net 25 "Net-(C20-Pad1)")) + (net 24 "Net-(C20-Pad1)")) (model ${KISYS3DMOD}/Crystal.3dshapes/Crystal_SMD_Abracon_ABM8G-4Pin_3.2x2.5mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -9829,9 +9539,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 374 "Net-(D23-Pad2)")) + (net 370 "Net-(D23-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 283 "Net-(C58-Pad1)")) + (net 279 "Net-(C58-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -9867,7 +9577,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 395 "Net-(C75-Pad1)")) + (net 390 "Net-(C75-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -9903,7 +9613,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 384 "Net-(C74-Pad1)")) + (net 380 "Net-(C74-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -9964,7 +9674,7 @@ (fp_line (start -5.75 -6) (end 5.75 -6) (layer F.Fab) (width 0.1)) (fp_circle (center 0 0) (end 0 -5.6) (layer F.Fab) (width 0.1)) (pad 1 smd rect (at -5.05 0 90) (size 2.8 5.3) (layers F.Cu F.Paste F.Mask) - (net 428 "Net-(C128-Pad1)")) + (net 423 "Net-(C128-Pad1)")) (pad 2 smd rect (at 5.05 0 90) (size 2.8 5.3) (layers F.Cu F.Paste F.Mask) (net 23 +3V3)) (model ${KISYS3DMOD}/Inductor_SMD.3dshapes/L_Bourns_SRR1210A.wrl @@ -10027,9 +9737,9 @@ (fp_line (start -5.75 -6) (end 5.75 -6) (layer F.Fab) (width 0.1)) (fp_circle (center 0 0) (end 0 -5.6) (layer F.Fab) (width 0.1)) (pad 1 smd rect (at -5.05 0 270) (size 2.8 5.3) (layers F.Cu F.Paste F.Mask) - (net 207 "Net-(D20-Pad1)")) + (net 203 "Net-(D20-Pad1)")) (pad 2 smd rect (at 5.05 0 270) (size 2.8 5.3) (layers F.Cu F.Paste F.Mask) - (net 24 +5V)) + (net 197 USB_PWR)) (model ${KISYS3DMOD}/Inductor_SMD.3dshapes/L_Bourns_SRR1210A.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -10063,9 +9773,9 @@ (fp_line (start -1.6 -1.25) (end 1.6 -1.25) (layer F.Fab) (width 0.1)) (fp_line (start -1.6 1.25) (end -1.6 -1.25) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 1.4 0 90) (size 1.25 2.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.2) - (net 33 "Net-(D1-Pad1)")) + (net 32 "Net-(D1-Pad1)")) (pad 1 smd roundrect (at -1.4 0 90) (size 1.25 2.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.2) - (net 361 BAT1+)) + (net 357 BAT1+)) (model ${KISYS3DMOD}/Inductor_SMD.3dshapes/L_1210_3225Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -10113,13 +9823,13 @@ (pad 5 thru_hole oval (at 12 0 180) (size 1.5 2.02) (drill 1.02) (layers *.Cu *.Mask) (net 15 GND)) (pad 4 thru_hole oval (at 9 0 180) (size 1.5 2.02) (drill 1.02) (layers *.Cu *.Mask) - (net 368 BAT8+)) + (net 364 BAT8+)) (pad 3 thru_hole oval (at 6 0 180) (size 1.5 2.02) (drill 1.02) (layers *.Cu *.Mask) - (net 367 BAT7+)) + (net 363 BAT7+)) (pad 2 thru_hole oval (at 3 0 180) (size 1.5 2.02) (drill 1.02) (layers *.Cu *.Mask) - (net 366 BAT6+)) + (net 362 BAT6+)) (pad 1 thru_hole roundrect (at 0 0 180) (size 1.5 2.02) (drill 1.02) (layers *.Cu *.Mask) (roundrect_rratio 0.166667) - (net 365 BAT5+)) + (net 361 BAT5+)) (pad "" np_thru_hole circle (at 9.85 -4.32 180) (size 3 3) (drill 3) (layers *.Cu *.Mask)) (pad "" np_thru_hole circle (at 2.15 -4.32 180) (size 3 3) (drill 3) (layers *.Cu *.Mask)) (model ${KISYS3DMOD}/Connector_Molex.3dshapes/Molex_Micro-Fit_3.0_43650-0500_1x05_P3.00mm_Horizontal.wrl @@ -10167,15 +9877,15 @@ (fp_line (start -3.325 -7.92) (end -2.325 -8.92) (layer F.Fab) (width 0.1)) (fp_line (start -3.325 0.98) (end -3.325 -7.92) (layer F.Fab) (width 0.1)) (pad 5 thru_hole oval (at 12 0 180) (size 1.5 2.02) (drill 1.02) (layers *.Cu *.Mask) - (net 365 BAT5+)) + (net 361 BAT5+)) (pad 4 thru_hole oval (at 9 0 180) (size 1.5 2.02) (drill 1.02) (layers *.Cu *.Mask) - (net 364 BAT4+)) + (net 360 BAT4+)) (pad 3 thru_hole oval (at 6 0 180) (size 1.5 2.02) (drill 1.02) (layers *.Cu *.Mask) - (net 363 BAT3+)) + (net 359 BAT3+)) (pad 2 thru_hole oval (at 3 0 180) (size 1.5 2.02) (drill 1.02) (layers *.Cu *.Mask) - (net 362 BAT2+)) + (net 358 BAT2+)) (pad 1 thru_hole roundrect (at 0 0 180) (size 1.5 2.02) (drill 1.02) (layers *.Cu *.Mask) (roundrect_rratio 0.166667) - (net 361 BAT1+)) + (net 357 BAT1+)) (pad "" np_thru_hole circle (at 9.85 -4.32 180) (size 3 3) (drill 3) (layers *.Cu *.Mask)) (pad "" np_thru_hole circle (at 2.15 -4.32 180) (size 3 3) (drill 3) (layers *.Cu *.Mask)) (model ${KISYS3DMOD}/Connector_Molex.3dshapes/Molex_Micro-Fit_3.0_43650-0500_1x05_P3.00mm_Horizontal.wrl @@ -10211,9 +9921,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 383 "Net-(C83-Pad1)")) + (net 379 "Net-(C83-Pad1)")) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 216 USB3_2_VBUS)) + (net 212 USB3_2_VBUS)) (model ${KISYS3DMOD}/Inductor_SMD.3dshapes/L_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -10247,9 +9957,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 382 "Net-(C81-Pad1)")) + (net 378 "Net-(C81-Pad1)")) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 201 USB_PWR)) + (net 197 USB_PWR)) (model ${KISYS3DMOD}/Inductor_SMD.3dshapes/L_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -10283,9 +9993,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 380 "Net-(C72-Pad1)")) + (net 376 "Net-(C72-Pad1)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 381 USB3_4_VBUS)) + (net 377 USB3_4_VBUS)) (model ${KISYS3DMOD}/Inductor_SMD.3dshapes/L_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -10319,9 +10029,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 378 "Net-(C71-Pad1)")) + (net 374 "Net-(C71-Pad1)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 379 USB3_3_VBUS)) + (net 375 USB3_3_VBUS)) (model ${KISYS3DMOD}/Inductor_SMD.3dshapes/L_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -10355,9 +10065,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 377 "Net-(C69-Pad1)")) + (net 373 "Net-(C69-Pad1)")) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 221 USB3_1_VBUS)) + (net 217 USB3_1_VBUS)) (model ${KISYS3DMOD}/Inductor_SMD.3dshapes/L_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -10393,9 +10103,9 @@ (fp_line (start -0.5 -0.4) (end -0.8 -0.1) (layer F.Fab) (width 0.1)) (fp_line (start 0.8 -0.4) (end -0.5 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 374 "Net-(D23-Pad2)")) + (net 370 "Net-(D23-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 375 "Net-(D23-Pad1)")) + (net 371 "Net-(D23-Pad1)")) (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -10439,7 +10149,7 @@ (pad 2 smd rect (at 1.65 0 90) (size 0.9 1.2) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 1 smd rect (at -1.65 0 90) (size 0.9 1.2) (layers F.Cu F.Paste F.Mask) - (net 33 "Net-(D1-Pad1)")) + (net 32 "Net-(D1-Pad1)")) (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SOD-123.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -10473,9 +10183,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 373 "Net-(C82-Pad2)")) + (net 369 "Net-(C82-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 305 USB2_TX_P)) + (net 301 USB2_TX_P)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -10509,9 +10219,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 372 "Net-(C80-Pad2)")) + (net 368 "Net-(C80-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 304 USB2_TX_N)) + (net 300 USB2_TX_N)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -10547,7 +10257,7 @@ (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 371 +1V5)) + (net 367 +1V5)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -10675,11 +10385,11 @@ (pad 4 thru_hole oval (at 0 6 270) (size 1.35 1.35) (drill 0.8) (layers *.Cu *.Mask) (net 15 GND)) (pad 3 thru_hole oval (at 0 4 270) (size 1.35 1.35) (drill 0.8) (layers *.Cu *.Mask) - (net 369 "Net-(J14-Pad3)")) + (net 365 "Net-(J14-Pad3)")) (pad 2 thru_hole oval (at 0 2 270) (size 1.35 1.35) (drill 0.8) (layers *.Cu *.Mask) - (net 370 "Net-(J14-Pad2)")) + (net 366 "Net-(J14-Pad2)")) (pad 1 thru_hole rect (at 0 0 270) (size 1.35 1.35) (drill 0.8) (layers *.Cu *.Mask) - (net 380 "Net-(C72-Pad1)")) + (net 376 "Net-(C72-Pad1)")) (model ${KISYS3DMOD}/Connector_PinHeader_2.00mm.3dshapes/PinHeader_1x04_P2.00mm_Horizontal.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -10800,11 +10510,11 @@ (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 2.05 0.8 180) (size 0.9 1) (layers F.Cu F.Paste F.Mask) - (net 336 "/Reform 2 Power/LPC_NRESET")) + (net 332 "/Reform 2 Power/LPC_NRESET")) (pad 1 smd rect (at 2.05 -0.8 180) (size 0.9 1) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 2 smd rect (at -2.05 0.8 180) (size 0.9 1) (layers F.Cu F.Paste F.Mask) - (net 336 "/Reform 2 Power/LPC_NRESET")) + (net 332 "/Reform 2 Power/LPC_NRESET")) (pad 1 smd rect (at -2.05 -0.8 180) (size 0.9 1) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (model ${KISYS3DMOD}/Button_Switch_SMD.3dshapes/SW_Push_1P1T_NO_CK_KMR2.wrl @@ -10840,7 +10550,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 302 "Net-(R77-Pad2)")) + (net 298 "Net-(R77-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl @@ -10876,9 +10586,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 301 "/Reform 2 Power/LPC_SSEL1")) + (net 297 "/Reform 2 Power/LPC_SSEL1")) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 128 BMON_CS)) + (net 125 BMON_CS)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -10912,9 +10622,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 300 "/Reform 2 Power/LPC_MOSI1b")) + (net 296 "/Reform 2 Power/LPC_MOSI1b")) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 129 BMON_SDO)) + (net 126 BMON_SDO)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -10948,9 +10658,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 299 "/Reform 2 Power/LPC_MISO1b")) + (net 295 "/Reform 2 Power/LPC_MISO1b")) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 130 BMON_SDI)) + (net 127 BMON_SDI)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -10984,9 +10694,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 298 "/Reform 2 Power/LPC_SCK1b")) + (net 294 "/Reform 2 Power/LPC_SCK1b")) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 131 BMON_SCK)) + (net 128 BMON_SCK)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -11020,9 +10730,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 297 "Net-(R72-Pad2)")) + (net 293 "Net-(R72-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 287 "Net-(J8-Pad2)")) + (net 283 "Net-(J8-Pad2)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -11056,7 +10766,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 284 "Net-(J8-Pad3)")) + (net 280 "Net-(J8-Pad3)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 23 +3V3)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl @@ -11092,9 +10802,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 296 "Net-(R70-Pad2)")) + (net 292 "Net-(R70-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 284 "Net-(J8-Pad3)")) + (net 280 "Net-(J8-Pad3)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -11128,7 +10838,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 295 CHG_SCL)) + (net 291 CHG_SCL)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 23 +3V3)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl @@ -11164,7 +10874,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 294 CHG_SDA)) + (net 290 CHG_SDA)) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 23 +3V3)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl @@ -11630,21 +11340,21 @@ (pad 75 smd rect (at 9.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 74 smd rect (at 9 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 283 "Net-(C58-Pad1)")) + (net 279 "Net-(C58-Pad1)")) (pad 73 smd rect (at 8.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 72 smd rect (at 8.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 283 "Net-(C58-Pad1)")) + (net 279 "Net-(C58-Pad1)")) (pad 71 smd rect (at 8.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 70 smd rect (at 8 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 283 "Net-(C58-Pad1)")) + (net 279 "Net-(C58-Pad1)")) (pad 69 smd rect (at 7.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 339 "Net-(J10-Pad69)")) + (net 335 "Net-(J10-Pad69)")) (pad 68 smd rect (at 7.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 386 "Net-(J10-Pad68)")) + (net 382 "Net-(J10-Pad68)")) (pad 67 smd rect (at 7.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 340 "Net-(J10-Pad67)")) + (net 336 "Net-(J10-Pad67)")) (pad 66 smd rect (at 5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask)) (pad 65 smd rect (at 4.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask)) (pad 64 smd rect (at 4.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask)) @@ -11654,103 +11364,103 @@ (pad 60 smd rect (at 3.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask)) (pad 59 smd rect (at 3.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask)) (pad 58 smd rect (at 3 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 341 "Net-(J10-Pad58)")) + (net 337 "Net-(J10-Pad58)")) (pad 57 smd rect (at 2.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 56 smd rect (at 2.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 342 "Net-(J10-Pad56)")) + (net 338 "Net-(J10-Pad56)")) (pad 55 smd rect (at 2.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 247 PCIE2_CLK_P)) + (net 243 PCIE2_CLK_P)) (pad 54 smd rect (at 2 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 387 "Net-(J10-Pad54)")) + (net 383 "Net-(J10-Pad54)")) (pad 53 smd rect (at 1.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 246 PCIE2_CLK_N)) + (net 242 PCIE2_CLK_N)) (pad 52 smd rect (at 1.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 388 "/Reform 2 PCIe/M2_CLKREQn")) + (net 568 PCIE2_CLKREQn)) (pad 51 smd rect (at 1.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 50 smd rect (at 1 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 277 PCIE_RESETn)) + (net 273 PCIE_RESETn)) (pad 49 smd rect (at 0.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 389 "Net-(C121-Pad1)")) + (net 384 "Net-(C121-Pad1)")) (pad 48 smd rect (at 0.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 343 "Net-(J10-Pad48)")) + (net 339 "Net-(J10-Pad48)")) (pad 47 smd rect (at 0.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 390 "Net-(C122-Pad1)")) + (net 385 "Net-(C122-Pad1)")) (pad 46 smd rect (at 0 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 344 "Net-(J10-Pad46)")) + (net 340 "Net-(J10-Pad46)")) (pad 45 smd rect (at -0.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 44 smd rect (at -0.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 391 "/Reform 2 PCIe/M2_SMB_ALERTn")) + (net 386 "/Reform 2 PCIe/M2_SMB_ALERTn")) (pad 43 smd rect (at -0.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 248 PCIE2_RX_P)) + (net 244 PCIE2_RX_P)) (pad 42 smd rect (at -1 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 392 "/Reform 2 PCIe/M2_SMB_DATA")) + (net 387 "/Reform 2 PCIe/M2_SMB_DATA")) (pad 41 smd rect (at -1.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 249 PCIE2_RX_N)) + (net 245 PCIE2_RX_N)) (pad 40 smd rect (at -1.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 393 "/Reform 2 PCIe/M2_SMB_CLK")) + (net 388 "/Reform 2 PCIe/M2_SMB_CLK")) (pad 39 smd rect (at -1.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 38 smd rect (at -2 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 394 "Net-(J10-Pad38)")) + (net 389 "Net-(J10-Pad38)")) (pad 37 smd rect (at -2.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 345 "Net-(J10-Pad37)")) + (net 341 "Net-(J10-Pad37)")) (pad 36 smd rect (at -2.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 346 "Net-(J10-Pad36)")) + (net 342 "Net-(J10-Pad36)")) (pad 35 smd rect (at -2.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 347 "Net-(J10-Pad35)")) + (net 343 "Net-(J10-Pad35)")) (pad 34 smd rect (at -3 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 348 "Net-(J10-Pad34)")) + (net 344 "Net-(J10-Pad34)")) (pad 33 smd rect (at -3.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 32 smd rect (at -3.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 349 "Net-(J10-Pad32)")) + (net 345 "Net-(J10-Pad32)")) (pad 31 smd rect (at -3.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 350 "Net-(J10-Pad31)")) + (net 346 "Net-(J10-Pad31)")) (pad 30 smd rect (at -4 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 351 "Net-(J10-Pad30)")) + (net 347 "Net-(J10-Pad30)")) (pad 29 smd rect (at -4.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 352 "Net-(J10-Pad29)")) + (net 348 "Net-(J10-Pad29)")) (pad 28 smd rect (at -4.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 353 "Net-(J10-Pad28)")) + (net 349 "Net-(J10-Pad28)")) (pad 27 smd rect (at -4.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 26 smd rect (at -5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 354 "Net-(J10-Pad26)")) + (net 350 "Net-(J10-Pad26)")) (pad 25 smd rect (at -5.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 355 "Net-(J10-Pad25)")) + (net 351 "Net-(J10-Pad25)")) (pad 24 smd rect (at -5.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 356 "Net-(J10-Pad24)")) + (net 352 "Net-(J10-Pad24)")) (pad 23 smd rect (at -5.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 357 "Net-(J10-Pad23)")) + (net 353 "Net-(J10-Pad23)")) (pad 22 smd rect (at -6 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 358 "Net-(J10-Pad22)")) + (net 354 "Net-(J10-Pad22)")) (pad 21 smd rect (at -6.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 20 smd rect (at -6.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 359 "Net-(J10-Pad20)")) + (net 355 "Net-(J10-Pad20)")) (pad 11 smd rect (at -6.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 360 "Net-(J10-Pad11)")) + (net 356 "Net-(J10-Pad11)")) (pad 10 smd rect (at -7 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 375 "Net-(D23-Pad1)")) + (net 371 "Net-(D23-Pad1)")) (pad 9 smd rect (at -7.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 8 smd rect (at -7.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 293 "Net-(J10-Pad8)")) + (net 289 "Net-(J10-Pad8)")) (pad 7 smd rect (at -7.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 292 "Net-(J10-Pad7)")) + (net 288 "Net-(J10-Pad7)")) (pad 6 smd rect (at -8 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 291 "Net-(J10-Pad6)")) + (net 287 "Net-(J10-Pad6)")) (pad 5 smd rect (at -8.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 290 "Net-(J10-Pad5)")) + (net 286 "Net-(J10-Pad5)")) (pad 4 smd rect (at -8.5 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 283 "Net-(C58-Pad1)")) + (net 279 "Net-(C58-Pad1)")) (pad 3 smd rect (at -8.75 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 2 smd rect (at -9 2.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) - (net 283 "Net-(C58-Pad1)")) + (net 279 "Net-(C58-Pad1)")) (pad 1 smd rect (at -9.25 -5.275) (size 0.3 1.55) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad Hole np_thru_hole circle (at 10 0) (size 1.6 1.6) (drill 1.6) (layers *.Cu *.Mask F.SilkS)) @@ -11816,101 +11526,101 @@ (fp_line (start 3.61 3.61) (end 3.61 3.16) (layer F.SilkS) (width 0.12)) (fp_line (start 3.16 3.61) (end 3.61 3.61) (layer F.SilkS) (width 0.12)) (pad 48 smd roundrect (at -2.75 -4.1625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 306 "Net-(U18-Pad48)")) + (net 302 "Net-(U18-Pad48)")) (pad 47 smd roundrect (at -2.25 -4.1625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 307 "/Reform 2 Power/LPC_TXDa")) + (net 303 "/Reform 2 Power/LPC_TXDa")) (pad 46 smd roundrect (at -1.75 -4.1625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 308 "/Reform 2 Power/LPC_RXDa")) + (net 304 "/Reform 2 Power/LPC_RXDa")) (pad 45 smd roundrect (at -1.25 -4.1625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 309 "/Reform 2 Power/LPC_SCLKa")) + (net 305 "/Reform 2 Power/LPC_SCLKa")) (pad 44 smd roundrect (at -0.75 -4.1625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 23 +3V3)) (pad 43 smd roundrect (at -0.25 -4.1625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 310 "/Reform 2 Power/LPC_SCK1a")) + (net 306 "/Reform 2 Power/LPC_SCK1a")) (pad 42 smd roundrect (at 0.25 -4.1625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 311 "/Reform 2 Power/LPC_AD7")) + (net 307 "/Reform 2 Power/LPC_AD7")) (pad 41 smd roundrect (at 0.75 -4.1625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 40 smd roundrect (at 1.25 -4.1625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 312 "/Reform 2 Power/LPC_AD5")) + (net 308 "/Reform 2 Power/LPC_AD5")) (pad 39 smd roundrect (at 1.75 -4.1625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 313 "/Reform 2 Power/LPC_SWDIO")) + (net 309 "/Reform 2 Power/LPC_SWDIO")) (pad 38 smd roundrect (at 2.25 -4.1625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 300 "/Reform 2 Power/LPC_MOSI1b")) + (net 296 "/Reform 2 Power/LPC_MOSI1b")) (pad 37 smd roundrect (at 2.75 -4.1625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 314 "/Reform 2 Power/LPC_RXDb")) + (net 310 "/Reform 2 Power/LPC_RXDb")) (pad 36 smd roundrect (at 4.1625 -2.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 315 "/Reform 2 Power/LPC_TXDb")) + (net 311 "/Reform 2 Power/LPC_TXDb")) (pad 35 smd roundrect (at 4.1625 -2.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 316 "/Reform 2 Power/LPC_TRST")) + (net 312 "/Reform 2 Power/LPC_TRST")) (pad 34 smd roundrect (at 4.1625 -1.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 317 "/Reform 2 Power/LPC_TDO")) + (net 313 "/Reform 2 Power/LPC_TDO")) (pad 33 smd roundrect (at 4.1625 -1.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 318 "/Reform 2 Power/LPC_TMS")) + (net 314 "/Reform 2 Power/LPC_TMS")) (pad 32 smd roundrect (at 4.1625 -0.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 319 "/Reform 2 Power/LPC_TDI")) + (net 315 "/Reform 2 Power/LPC_TDI")) (pad 31 smd roundrect (at 4.1625 -0.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 320 "/Reform 2 Power/LPC_SCK0b")) + (net 316 "/Reform 2 Power/LPC_SCK0b")) (pad 30 smd roundrect (at 4.1625 0.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 321 "/Reform 2 Power/LPC_MISO1a")) + (net 317 "/Reform 2 Power/LPC_MISO1a")) (pad 29 smd roundrect (at 4.1625 0.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 322 "/Reform 2 Power/LPC_SCK0a")) + (net 318 "/Reform 2 Power/LPC_SCK0a")) (pad 28 smd roundrect (at 4.1625 1.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 323 "/Reform 2 Power/LPC_MOSI0")) + (net 319 "/Reform 2 Power/LPC_MOSI0")) (pad 27 smd roundrect (at 4.1625 1.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 324 "/Reform 2 Power/LPC_MISO0")) + (net 320 "/Reform 2 Power/LPC_MISO0")) (pad 26 smd roundrect (at 4.1625 2.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 299 "/Reform 2 Power/LPC_MISO1b")) + (net 295 "/Reform 2 Power/LPC_MISO1b")) (pad 25 smd roundrect (at 4.1625 2.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 325 "Net-(U18-Pad25)")) + (net 321 "Net-(U18-Pad25)")) (pad 24 smd roundrect (at 2.75 4.1625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 326 "/Reform 2 Power/LPC_SCLKc")) + (net 322 "/Reform 2 Power/LPC_SCLKc")) (pad 23 smd roundrect (at 2.25 4.1625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 327 "/Reform 2 Power/LPC_NCTS")) + (net 323 "/Reform 2 Power/LPC_NCTS")) (pad 22 smd roundrect (at 1.75 4.1625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 328 "/Reform 2 Power/LPC_NUSBCON")) + (net 324 "/Reform 2 Power/LPC_NUSBCON")) (pad 21 smd roundrect (at 1.25 4.1625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 329 "/Reform 2 Power/LPC_SCLKb")) + (net 325 "/Reform 2 Power/LPC_SCLKb")) (pad 20 smd roundrect (at 0.75 4.1625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 296 "Net-(R70-Pad2)")) + (net 292 "Net-(R70-Pad2)")) (pad 19 smd roundrect (at 0.25 4.1625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 297 "Net-(R72-Pad2)")) + (net 293 "Net-(R72-Pad2)")) (pad 18 smd roundrect (at -0.25 4.1625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 301 "/Reform 2 Power/LPC_SSEL1")) + (net 297 "/Reform 2 Power/LPC_SSEL1")) (pad 17 smd roundrect (at -0.75 4.1625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 330 "/Reform 2 Power/LPC_MOSI1a")) + (net 326 "/Reform 2 Power/LPC_MOSI1a")) (pad 16 smd roundrect (at -1.25 4.1625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 294 CHG_SDA)) + (net 290 CHG_SDA)) (pad 15 smd roundrect (at -1.75 4.1625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 295 CHG_SCL)) + (net 291 CHG_SCL)) (pad 14 smd roundrect (at -2.25 4.1625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 331 "/Reform 2 Power/LPC_UVBUS")) + (net 327 "/Reform 2 Power/LPC_UVBUS")) (pad 13 smd roundrect (at -2.75 4.1625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 298 "/Reform 2 Power/LPC_SCK1b")) + (net 294 "/Reform 2 Power/LPC_SCK1b")) (pad 12 smd roundrect (at -4.1625 2.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 332 "/Reform 2 Power/LPC_TXDc")) + (net 328 "/Reform 2 Power/LPC_TXDc")) (pad 11 smd roundrect (at -4.1625 2.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 333 "/Reform 2 Power/LPC_RXDc")) + (net 329 "/Reform 2 Power/LPC_RXDc")) (pad 10 smd roundrect (at -4.1625 1.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 334 "/Reform 2 Power/LPC_SSEL0")) + (net 330 "/Reform 2 Power/LPC_SSEL0")) (pad 9 smd roundrect (at -4.1625 1.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 335 "Net-(U18-Pad9)")) + (net 331 "Net-(U18-Pad9)")) (pad 8 smd roundrect (at -4.1625 0.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 23 +3V3)) (pad 7 smd roundrect (at -4.1625 0.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 280 "Net-(C48-Pad1)")) + (net 276 "Net-(C48-Pad1)")) (pad 6 smd roundrect (at -4.1625 -0.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 281 "Net-(C51-Pad1)")) + (net 277 "Net-(C51-Pad1)")) (pad 5 smd roundrect (at -4.1625 -0.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 4 smd roundrect (at -4.1625 -1.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 303 "/Reform 2 Power/LPC_UFTOGG")) + (net 299 "/Reform 2 Power/LPC_UFTOGG")) (pad 3 smd roundrect (at -4.1625 -1.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 336 "/Reform 2 Power/LPC_NRESET")) + (net 332 "/Reform 2 Power/LPC_NRESET")) (pad 2 smd roundrect (at -4.1625 -2.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 337 "/Reform 2 Power/LPC_NDTR")) + (net 333 "/Reform 2 Power/LPC_NDTR")) (pad 1 smd roundrect (at -4.1625 -2.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 338 "Net-(U18-Pad1)")) + (net 334 "Net-(U18-Pad1)")) (model ${KISYS3DMOD}/Package_QFP.3dshapes/LQFP-48_7x7mm_P0.5mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -11942,7 +11652,7 @@ (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 smd rect (at 0 0) (size 1 1) (layers F.Cu F.Mask) - (net 294 CHG_SDA)) + (net 290 CHG_SDA)) ) (module TestPoint:TestPoint_Pad_1.0x1.0mm (layer F.Cu) (tedit 5A0F774F) (tstamp 5D14CFDC) @@ -11969,7 +11679,7 @@ (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 smd rect (at 0 0) (size 1 1) (layers F.Cu F.Mask) - (net 295 CHG_SCL)) + (net 291 CHG_SCL)) ) (module Button_Switch_SMD:SW_Push_1P1T_NO_CK_KMR2 (layer F.Cu) (tedit 5A02FC95) (tstamp 5D14CFC0) @@ -12001,11 +11711,11 @@ (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 2.05 0.8 180) (size 0.9 1) (layers F.Cu F.Paste F.Mask) - (net 303 "/Reform 2 Power/LPC_UFTOGG")) + (net 299 "/Reform 2 Power/LPC_UFTOGG")) (pad 1 smd rect (at 2.05 -0.8 180) (size 0.9 1) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 2 smd rect (at -2.05 0.8 180) (size 0.9 1) (layers F.Cu F.Paste F.Mask) - (net 303 "/Reform 2 Power/LPC_UFTOGG")) + (net 299 "/Reform 2 Power/LPC_UFTOGG")) (pad 1 smd rect (at -2.05 -0.8 180) (size 0.9 1) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (model ${KISYS3DMOD}/Button_Switch_SMD.3dshapes/SW_Push_1P1T_NO_CK_KMR2.wrl @@ -12099,11 +11809,11 @@ (pad 4 thru_hole oval (at 0 6 270) (size 1.35 1.35) (drill 0.8) (layers *.Cu *.Mask) (net 15 GND)) (pad 3 thru_hole oval (at 0 4 270) (size 1.35 1.35) (drill 0.8) (layers *.Cu *.Mask) - (net 288 "Net-(J9-Pad3)")) + (net 284 "Net-(J9-Pad3)")) (pad 2 thru_hole oval (at 0 2 270) (size 1.35 1.35) (drill 0.8) (layers *.Cu *.Mask) - (net 289 "Net-(J9-Pad2)")) + (net 285 "Net-(J9-Pad2)")) (pad 1 thru_hole rect (at 0 0 270) (size 1.35 1.35) (drill 0.8) (layers *.Cu *.Mask) - (net 378 "Net-(C71-Pad1)")) + (net 374 "Net-(C71-Pad1)")) (model ${KISYS3DMOD}/Connector_PinHeader_2.00mm.3dshapes/PinHeader_1x04_P2.00mm_Horizontal.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -12164,15 +11874,15 @@ (pad 6 thru_hole circle (at 2.5 -1.4625) (size 1.45 1.45) (drill 0.85) (layers *.Cu *.Mask) (net 15 GND)) (pad 3 smd rect (at 0 -1.4625) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) - (net 284 "Net-(J8-Pad3)")) + (net 280 "Net-(J8-Pad3)")) (pad 4 smd rect (at 0.65 -1.4625) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) - (net 285 "Net-(J8-Pad4)")) + (net 281 "Net-(J8-Pad4)")) (pad 5 smd rect (at 1.3 -1.4625) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 1 smd rect (at -1.3 -1.4625) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) - (net 286 "Net-(J8-Pad1)")) + (net 282 "Net-(J8-Pad1)")) (pad 2 smd rect (at -0.65 -1.4625) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) - (net 287 "Net-(J8-Pad2)")) + (net 283 "Net-(J8-Pad2)")) (pad 6 thru_hole circle (at -2.5 -1.4625) (size 1.45 1.45) (drill 0.85) (layers *.Cu *.Mask) (net 15 GND)) (pad 6 smd rect (at 1 1.2375) (size 1.5 1.9) (layers F.Cu F.Paste F.Mask) @@ -12212,7 +11922,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 283 "Net-(C58-Pad1)")) + (net 279 "Net-(C58-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -12248,7 +11958,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 283 "Net-(C58-Pad1)")) + (net 279 "Net-(C58-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -12284,7 +11994,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 283 "Net-(C58-Pad1)")) + (net 279 "Net-(C58-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -12320,7 +12030,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 283 "Net-(C58-Pad1)")) + (net 279 "Net-(C58-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -12356,7 +12066,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 282 "Net-(C52-Pad1)")) + (net 278 "Net-(C52-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -12392,7 +12102,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 282 "Net-(C52-Pad1)")) + (net 278 "Net-(C52-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -12428,7 +12138,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 282 "Net-(C52-Pad1)")) + (net 278 "Net-(C52-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -12464,7 +12174,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 282 "Net-(C52-Pad1)")) + (net 278 "Net-(C52-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -12500,7 +12210,7 @@ (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 281 "Net-(C51-Pad1)")) + (net 277 "Net-(C51-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -12608,7 +12318,7 @@ (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 280 "Net-(C48-Pad1)")) + (net 276 "Net-(C48-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -12719,31 +12429,31 @@ (fp_line (start 10.4 11.75) (end -3.4 11.75) (layer F.Fab) (width 0.1)) (fp_line (start -3.4 -2.5) (end 10.4 -2.5) (layer F.Fab) (width 0.1)) (pad 1 thru_hole circle (at 0 0 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) - (net 383 "Net-(C83-Pad1)")) + (net 379 "Net-(C83-Pad1)")) (pad 2 thru_hole circle (at 2.5 0 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) - (net 215 USB3_2_DN)) + (net 211 USB3_2_DN)) (pad 3 thru_hole circle (at 4.5 0 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) - (net 214 USB3_2_DP)) + (net 210 USB3_2_DP)) (pad 4 thru_hole circle (at 7 0 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) (net 15 GND)) (pad 5 thru_hole circle (at 7.5 -1.5 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) - (net 213 USB3_2_SSRXN)) + (net 209 USB3_2_SSRXN)) (pad 6 thru_hole circle (at 5.5 -1.5 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) - (net 212 USB3_2_SSRXP)) + (net 208 USB3_2_SSRXP)) (pad 7 thru_hole circle (at 3.5 -1.5 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) (net 15 GND)) (pad 8 thru_hole circle (at 1.5 -1.5 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) - (net 193 "Net-(C39-Pad2)")) + (net 189 "Net-(C39-Pad2)")) (pad 9 thru_hole circle (at -0.5 -1.5 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) - (net 197 "Net-(C41-Pad2)")) + (net 193 "Net-(C41-Pad2)")) (pad 10 thru_hole oval (at 9.9 -0.75 270) (size 1.2 2.4) (drill oval 0.6 1.7) (layers *.Cu *.Mask) - (net 384 "Net-(C74-Pad1)")) + (net 380 "Net-(C74-Pad1)")) (pad 10 thru_hole oval (at -2.9 -0.75 270) (size 1.2 2.4) (drill oval 0.6 1.7) (layers *.Cu *.Mask) - (net 384 "Net-(C74-Pad1)")) + (net 380 "Net-(C74-Pad1)")) (pad 10 thru_hole oval (at 9.9 7.75 270) (size 1.2 2.1) (drill oval 0.6 1.4) (layers *.Cu *.Mask) - (net 384 "Net-(C74-Pad1)")) + (net 380 "Net-(C74-Pad1)")) (pad 10 thru_hole oval (at -2.9 7.75 270) (size 1.2 2.1) (drill oval 0.6 1.4) (layers *.Cu *.Mask) - (net 384 "Net-(C74-Pad1)")) + (net 380 "Net-(C74-Pad1)")) (model ${KIPRJMOD}/3d-models/483930001.stp (offset (xyz 3.5 -11.65 0.25)) (scale (xyz 1 1 1)) @@ -12827,13 +12537,13 @@ (pad 12 smd rect (at -1 0 90) (size 0.28 2.6) (layers F.Cu F.Paste F.Mask) (net 2 HDMI_D3-)) (pad 13 smd rect (at -1.5 0 90) (size 0.28 2.6) (layers F.Cu F.Paste F.Mask) - (net 75 "Net-(J4-Pad13)")) + (net 74 "Net-(J4-Pad13)")) (pad 14 smd rect (at -2 0 90) (size 0.28 2.6) (layers F.Cu F.Paste F.Mask) - (net 72 "Net-(J4-Pad14)")) + (net 71 "Net-(J4-Pad14)")) (pad 15 smd rect (at -2.5 0 90) (size 0.28 2.6) (layers F.Cu F.Paste F.Mask) - (net 74 "Net-(J4-Pad15)")) + (net 73 "Net-(J4-Pad15)")) (pad 16 smd rect (at -3 0 90) (size 0.28 2.6) (layers F.Cu F.Paste F.Mask) - (net 71 "Net-(J4-Pad16)")) + (net 70 "Net-(J4-Pad16)")) (pad 17 smd rect (at -3.5 0 90) (size 0.28 2.6) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 2 smd rect (at 4 0 90) (size 0.28 2.6) (layers F.Cu F.Paste F.Mask) @@ -12841,9 +12551,9 @@ (pad 1 smd rect (at 4.5 0 90) (size 0.28 2.6) (layers F.Cu F.Paste F.Mask) (net 1 HDMI_D2+)) (pad 18 smd rect (at -4 0 90) (size 0.28 2.6) (layers F.Cu F.Paste F.Mask) - (net 32 "Net-(C30-Pad1)")) + (net 31 "Net-(C30-Pad1)")) (pad 19 smd rect (at -4.5 0 90) (size 0.28 2.6) (layers F.Cu F.Paste F.Mask) - (net 73 "Net-(J4-Pad19)")) + (net 72 "Net-(J4-Pad19)")) (model /home/mntmn/code/zz9000/3d_models/685119134923--3DModel-STEP-56544.STEP (offset (xyz 0 -3 3.4)) (scale (xyz 1 1 1)) @@ -12907,13 +12617,13 @@ (pad 5 smd rect (at -5.775 3.4) (size 4.6 1.1) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 4 smd rect (at -5.775 1.7) (size 4.6 1.1) (layers F.Cu F.Paste F.Mask) - (net 24 +5V)) + (net 197 USB_PWR)) (pad 3 smd rect (at -5.775 0) (size 4.6 1.1) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 2 smd rect (at -5.775 -1.7) (size 4.6 1.1) (layers F.Cu F.Paste F.Mask) - (net 207 "Net-(D20-Pad1)")) + (net 203 "Net-(D20-Pad1)")) (pad 1 smd rect (at -5.775 -3.4) (size 4.6 1.1) (layers F.Cu F.Paste F.Mask) - (net 426 "Net-(C126-Pad1)")) + (net 421 "Net-(C126-Pad1)")) (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/TO-263-5_TabPin6.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -12956,7 +12666,7 @@ (pad 2 smd rect (at 2 0 180) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 1 smd rect (at -2 0 180) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask) - (net 428 "Net-(C128-Pad1)")) + (net 423 "Net-(C128-Pad1)")) (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SMA.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -12999,7 +12709,7 @@ (pad 2 smd rect (at 2 0) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 1 smd rect (at -2 0) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask) - (net 207 "Net-(D20-Pad1)")) + (net 203 "Net-(D20-Pad1)")) (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SMA.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -13069,23 +12779,23 @@ (pad 11 smd rect (at 0 0 180) (size 1.65 2.4) (layers F.Cu F.Mask) (net 15 GND)) (pad 10 smd rect (at 1.475 -1 180) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask) - (net 421 "Net-(R100-Pad1)")) + (net 416 "Net-(R100-Pad1)")) (pad 9 smd rect (at 1.475 -0.5 180) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask) - (net 379 USB3_3_VBUS)) + (net 375 USB3_3_VBUS)) (pad 8 smd rect (at 1.475 0 180) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask) - (net 381 USB3_4_VBUS)) + (net 377 USB3_4_VBUS)) (pad 7 smd rect (at 1.475 0.5 180) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask) - (net 422 "Net-(R99-Pad1)")) + (net 417 "Net-(R99-Pad1)")) (pad 6 smd rect (at 1.475 1 180) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask) - (net 423 "Net-(R101-Pad1)")) + (net 418 "Net-(R101-Pad1)")) (pad 5 smd rect (at -1.475 1 180) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask) - (net 424 "Net-(R95-Pad2)")) + (net 419 "Net-(R95-Pad2)")) (pad 4 smd rect (at -1.475 0.5 180) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask) - (net 425 "Net-(R94-Pad1)")) + (net 420 "Net-(R94-Pad1)")) (pad 3 smd rect (at -1.475 0 180) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask) - (net 24 +5V)) + (net 197 USB_PWR)) (pad 2 smd rect (at -1.475 -0.5 180) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask) - (net 24 +5V)) + (net 197 USB_PWR)) (pad 1 smd rect (at -1.475 -1 180) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (model ${KISYS3DMOD}/Package_SON.3dshapes/VSON-10-1EP_3x3mm_P0.5mm_EP1.65x2.4mm.wrl @@ -13157,23 +12867,23 @@ (pad 11 smd rect (at 0 0 270) (size 1.65 2.4) (layers F.Cu F.Mask) (net 15 GND)) (pad 10 smd rect (at 1.475 -1 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask) - (net 416 "Net-(R88-Pad1)")) + (net 411 "Net-(R88-Pad1)")) (pad 9 smd rect (at 1.475 -0.5 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask) - (net 221 USB3_1_VBUS)) + (net 217 USB3_1_VBUS)) (pad 8 smd rect (at 1.475 0 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask) - (net 216 USB3_2_VBUS)) + (net 212 USB3_2_VBUS)) (pad 7 smd rect (at 1.475 0.5 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask) - (net 417 "Net-(R87-Pad1)")) + (net 412 "Net-(R87-Pad1)")) (pad 6 smd rect (at 1.475 1 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask) - (net 418 "Net-(R89-Pad1)")) + (net 413 "Net-(R89-Pad1)")) (pad 5 smd rect (at -1.475 1 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask) - (net 419 "Net-(R83-Pad2)")) + (net 414 "Net-(R83-Pad2)")) (pad 4 smd rect (at -1.475 0.5 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask) - (net 420 "Net-(R82-Pad1)")) + (net 415 "Net-(R82-Pad1)")) (pad 3 smd rect (at -1.475 0 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask) - (net 24 +5V)) + (net 197 USB_PWR)) (pad 2 smd rect (at -1.475 -0.5 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask) - (net 24 +5V)) + (net 197 USB_PWR)) (pad 1 smd rect (at -1.475 -1 270) (size 0.85 0.28) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (model ${KISYS3DMOD}/Package_SON.3dshapes/VSON-10-1EP_3x3mm_P0.5mm_EP1.65x2.4mm.wrl @@ -13210,9 +12920,9 @@ (effects (font (size 0.5 0.5) (thickness 0.075))) ) (pad 5 smd rect (at 1.1 -0.95 180) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) - (net 192 +1V1)) + (net 188 +1V1)) (pad 4 smd rect (at 1.1 0.95 180) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) - (net 279 "Net-(U14-Pad4)")) + (net 275 "Net-(U14-Pad4)")) (pad 3 smd rect (at -1.1 0.95 180) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) (net 23 +3V3)) (pad 2 smd rect (at -1.1 0 180) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) @@ -13253,9 +12963,9 @@ (effects (font (size 0.5 0.5) (thickness 0.075))) ) (pad 5 smd rect (at 1.1 -0.95 180) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) - (net 191 +1V2)) + (net 187 +1V2)) (pad 4 smd rect (at 1.1 0.95 180) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) - (net 278 "Net-(U13-Pad4)")) + (net 274 "Net-(U13-Pad4)")) (pad 3 smd rect (at -1.1 0.95 180) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) (net 23 +3V3)) (pad 2 smd rect (at -1.1 0 180) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) @@ -13301,21 +13011,21 @@ (fp_line (start 1.5 -1.5) (end 1.5 1.5) (layer F.Fab) (width 0.15)) (fp_line (start -0.5 -1.5) (end 1.5 -1.5) (layer F.Fab) (width 0.15)) (pad 8 smd rect (at 2.2 -0.975 270) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 426 "Net-(C126-Pad1)")) + (net 421 "Net-(C126-Pad1)")) (pad 7 smd rect (at 2.2 -0.325 270) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 258 "Net-(U5-Pad7)")) + (net 254 "Net-(U5-Pad7)")) (pad 6 smd rect (at 2.2 0.325 270) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 233 "Net-(R54-Pad2)")) + (net 229 "Net-(R54-Pad2)")) (pad 5 smd rect (at 2.2 0.975 270) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 400 "Net-(R80-Pad1)")) + (net 395 "Net-(R80-Pad1)")) (pad 4 smd rect (at -2.2 0.975 270) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 89 BATPWR)) + (net 86 BATPWR)) (pad 3 smd rect (at -2.2 0.325 270) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 136 "Net-(U5-Pad3)")) + (net 133 "Net-(U5-Pad3)")) (pad 2 smd rect (at -2.2 -0.325 270) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 206 "Net-(D19-Pad2)")) + (net 202 "Net-(D19-Pad2)")) (pad 1 smd rect (at -2.2 -0.975 270) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 205 "Net-(D19-Pad1)")) + (net 201 "Net-(D19-Pad1)")) (model ${KISYS3DMOD}/Package_SO.3dshapes/MSOP-8_3x3mm_P0.65mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -13355,21 +13065,21 @@ (fp_line (start 1.5 -1.5) (end 1.5 1.5) (layer F.Fab) (width 0.15)) (fp_line (start -0.5 -1.5) (end 1.5 -1.5) (layer F.Fab) (width 0.15)) (pad 8 smd rect (at 2.2 -0.975 270) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 426 "Net-(C126-Pad1)")) + (net 421 "Net-(C126-Pad1)")) (pad 7 smd rect (at 2.2 -0.325 270) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 256 "Net-(U3-Pad7)")) + (net 252 "Net-(U3-Pad7)")) (pad 6 smd rect (at 2.2 0.325 270) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 231 "Net-(R51-Pad2)")) + (net 227 "Net-(R51-Pad2)")) (pad 5 smd rect (at 2.2 0.975 270) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 397 "Net-(R56-Pad1)")) + (net 392 "Net-(R56-Pad1)")) (pad 4 smd rect (at -2.2 0.975 270) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 210 "Net-(F1-Pad1)")) + (net 206 "Net-(F1-Pad1)")) (pad 3 smd rect (at -2.2 0.325 270) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 127 "Net-(U3-Pad3)")) + (net 124 "Net-(U3-Pad3)")) (pad 2 smd rect (at -2.2 -0.325 270) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 210 "Net-(F1-Pad1)")) + (net 206 "Net-(F1-Pad1)")) (pad 1 smd rect (at -2.2 -0.975 270) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 88 "Net-(Q3-Pad1)")) + (net 85 "Net-(Q3-Pad1)")) (model ${KISYS3DMOD}/Package_SO.3dshapes/MSOP-8_3x3mm_P0.65mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -13403,7 +13113,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 208 "Net-(D22-Pad2)")) + (net 204 "Net-(D22-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 23 +3V3)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl @@ -13439,9 +13149,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 243 EDP_SDA)) + (net 239 EDP_SDA)) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 242 +1V8)) + (net 238 +1V8)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -13475,9 +13185,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 241 EDP_SCL)) + (net 237 EDP_SCL)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 242 +1V8)) + (net 238 +1V8)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -13511,9 +13221,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 240 "Net-(R64-Pad2)")) + (net 236 "Net-(R64-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 62 "/Reform 2 Display/EDP_HPD")) + (net 61 "/Reform 2 Display/EDP_HPD")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -13549,7 +13259,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 239 "Net-(R63-Pad1)")) + (net 235 "Net-(R63-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -13585,7 +13295,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 238 "Net-(R61-Pad1)")) + (net 234 "Net-(R61-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -13619,9 +13329,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 201 USB_PWR)) + (net 197 USB_PWR)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 238 "Net-(R61-Pad1)")) + (net 234 "Net-(R61-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -13657,7 +13367,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 237 "Net-(R60-Pad1)")) + (net 233 "Net-(R60-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -13693,7 +13403,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 236 "Net-(R59-Pad1)")) + (net 232 "Net-(R59-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -13729,7 +13439,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 235 "Net-(R58-Pad1)")) + (net 231 "Net-(R58-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -13765,7 +13475,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 234 "Net-(R57-Pad1)")) + (net 230 "Net-(R57-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -13799,9 +13509,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 210 "Net-(F1-Pad1)")) + (net 206 "Net-(F1-Pad1)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 397 "Net-(R56-Pad1)")) + (net 392 "Net-(R56-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -13837,7 +13547,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 385 "Net-(C67-Pad1)")) + (net 381 "Net-(C67-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -13871,7 +13581,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 233 "Net-(R54-Pad2)")) + (net 229 "Net-(R54-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl @@ -13907,9 +13617,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 89 BATPWR)) + (net 86 BATPWR)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 206 "Net-(D19-Pad2)")) + (net 202 "Net-(D19-Pad2)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -13943,9 +13653,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 361 BAT1+)) + (net 357 BAT1+)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 232 "Net-(R52-Pad1)")) + (net 228 "Net-(R52-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -13979,7 +13689,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 231 "Net-(R51-Pad2)")) + (net 227 "Net-(R51-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl @@ -14017,7 +13727,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 229 "Net-(R3-Pad1)")) + (net 225 "Net-(R3-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -14053,7 +13763,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 230 "Net-(R49-Pad1)")) + (net 226 "Net-(R49-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -14087,9 +13797,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 228 "Net-(R3-Pad2)")) + (net 224 "Net-(R3-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 229 "Net-(R3-Pad1)")) + (net 225 "Net-(R3-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -14126,11 +13836,11 @@ (effects (font (size 0.5 0.5) (thickness 0.075))) ) (pad 3 smd rect (at 1 0 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 426 "Net-(C126-Pad1)")) + (net 421 "Net-(C126-Pad1)")) (pad 2 smd rect (at -1 0.95 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 206 "Net-(D19-Pad2)")) + (net 202 "Net-(D19-Pad2)")) (pad 1 smd rect (at -1 -0.95 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 205 "Net-(D19-Pad1)")) + (net 201 "Net-(D19-Pad1)")) (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -14167,11 +13877,11 @@ (effects (font (size 0.5 0.5) (thickness 0.075))) ) (pad 3 smd rect (at 1 0 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 89 BATPWR)) + (net 86 BATPWR)) (pad 2 smd rect (at -1 0.95 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 206 "Net-(D19-Pad2)")) + (net 202 "Net-(D19-Pad2)")) (pad 1 smd rect (at -1 -0.95 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 205 "Net-(D19-Pad1)")) + (net 201 "Net-(D19-Pad1)")) (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -14208,11 +13918,11 @@ (effects (font (size 0.5 0.5) (thickness 0.075))) ) (pad 3 smd rect (at 1 0 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 426 "Net-(C126-Pad1)")) + (net 421 "Net-(C126-Pad1)")) (pad 2 smd rect (at -1 0.95 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 210 "Net-(F1-Pad1)")) + (net 206 "Net-(F1-Pad1)")) (pad 1 smd rect (at -1 -0.95 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 88 "Net-(Q3-Pad1)")) + (net 85 "Net-(Q3-Pad1)")) (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -14249,21 +13959,21 @@ (fp_line (start 0 2.56) (end -1.95 2.56) (layer F.SilkS) (width 0.12)) (fp_line (start 0 2.56) (end 1.95 2.56) (layer F.SilkS) (width 0.12)) (pad 8 smd roundrect (at 2.475 -1.905 90) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 190 "Net-(C34-Pad1)")) + (net 186 "Net-(C34-Pad1)")) (pad 7 smd roundrect (at 2.475 -0.635 90) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 190 "Net-(C34-Pad1)")) + (net 186 "Net-(C34-Pad1)")) (pad 6 smd roundrect (at 2.475 0.635 90) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 190 "Net-(C34-Pad1)")) + (net 186 "Net-(C34-Pad1)")) (pad 5 smd roundrect (at 2.475 1.905 90) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 190 "Net-(C34-Pad1)")) + (net 186 "Net-(C34-Pad1)")) (pad 4 smd roundrect (at -2.475 1.905 90) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 227 "Net-(Q2-Pad4)")) + (net 223 "Net-(Q2-Pad4)")) (pad 3 smd roundrect (at -2.475 0.635 90) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 76 "Net-(L1-Pad2)")) + (net 75 "Net-(L1-Pad2)")) (pad 2 smd roundrect (at -2.475 -0.635 90) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 76 "Net-(L1-Pad2)")) + (net 75 "Net-(L1-Pad2)")) (pad 1 smd roundrect (at -2.475 -1.905 90) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 76 "Net-(L1-Pad2)")) + (net 75 "Net-(L1-Pad2)")) (model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-8_3.9x4.9mm_P1.27mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -14300,21 +14010,21 @@ (fp_line (start 0 2.56) (end -1.95 2.56) (layer F.SilkS) (width 0.12)) (fp_line (start 0 2.56) (end 1.95 2.56) (layer F.SilkS) (width 0.12)) (pad 8 smd roundrect (at 2.475 -1.905 90) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 225 "Net-(Q1-Pad5)")) + (net 221 "Net-(Q1-Pad5)")) (pad 7 smd roundrect (at 2.475 -0.635 90) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 225 "Net-(Q1-Pad5)")) + (net 221 "Net-(Q1-Pad5)")) (pad 6 smd roundrect (at 2.475 0.635 90) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 225 "Net-(Q1-Pad5)")) + (net 221 "Net-(Q1-Pad5)")) (pad 5 smd roundrect (at 2.475 1.905 90) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 225 "Net-(Q1-Pad5)")) + (net 221 "Net-(Q1-Pad5)")) (pad 4 smd roundrect (at -2.475 1.905 90) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 226 "Net-(Q1-Pad4)")) + (net 222 "Net-(Q1-Pad4)")) (pad 3 smd roundrect (at -2.475 0.635 90) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 187 +36V)) + (net 183 +36V)) (pad 2 smd roundrect (at -2.475 -0.635 90) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 187 +36V)) + (net 183 +36V)) (pad 1 smd roundrect (at -2.475 -1.905 90) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 187 +36V)) + (net 183 +36V)) (model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-8_3.9x4.9mm_P1.27mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -14350,17 +14060,17 @@ (pad Hole np_thru_hole circle (at -3.5 0 180) (size 1.7 1.7) (drill 1.7) (layers)) (pad Hole np_thru_hole circle (at 3.5 0 180) (size 1.7 1.7) (drill 1.7) (layers)) (pad 5 smd rect (at 8.9 -0.75 180) (size 2.8 2.8) (layers F.Cu F.Paste F.Mask) - (net 222 "Net-(J7-Pad5)")) + (net 218 "Net-(J7-Pad5)")) (pad 3 smd rect (at -2.7 -3.7 180) (size 2 2.8) (layers F.Cu F.Paste F.Mask) - (net 434 "Net-(C148-Pad2)")) + (net 429 "Net-(C148-Pad2)")) (pad 6 smd rect (at -5.5 -3.7 180) (size 2 2.8) (layers F.Cu F.Paste F.Mask) - (net 223 "Net-(J7-Pad6)")) + (net 219 "Net-(J7-Pad6)")) (pad 1 smd rect (at -7.4 3.7 180) (size 2 2.8) (layers F.Cu F.Paste F.Mask) - (net 432 "Net-(C147-Pad2)")) + (net 427 "Net-(C147-Pad2)")) (pad 4 smd rect (at -4.6 3.7 180) (size 2 2.8) (layers F.Cu F.Paste F.Mask) - (net 224 "Net-(J7-Pad4)")) + (net 220 "Net-(J7-Pad4)")) (pad 2 smd rect (at 4.8 3.7 180) (size 2.8 2.8) (layers F.Cu F.Paste F.Mask) - (net 430 "Net-(C145-Pad2)")) + (net 425 "Net-(C145-Pad2)")) (model ${KIPRJMOD}/3d-models/CUI_SJ-43516-SMT-TR.step (offset (xyz -8 0 2.6)) (scale (xyz 1 1 1)) @@ -14399,31 +14109,31 @@ (fp_line (start 10.46 -2.56) (end 10.46 -1.85) (layer F.SilkS) (width 0.12)) (fp_line (start -3.46 -2.56) (end -3.46 -1.85) (layer F.SilkS) (width 0.12)) (pad 10 thru_hole oval (at -2.9 7.75 270) (size 1.2 2.1) (drill oval 0.6 1.4) (layers *.Cu *.Mask) - (net 385 "Net-(C67-Pad1)")) + (net 381 "Net-(C67-Pad1)")) (pad 10 thru_hole oval (at 9.9 7.75 270) (size 1.2 2.1) (drill oval 0.6 1.4) (layers *.Cu *.Mask) - (net 385 "Net-(C67-Pad1)")) + (net 381 "Net-(C67-Pad1)")) (pad 10 thru_hole oval (at -2.9 -0.75 270) (size 1.2 2.4) (drill oval 0.6 1.7) (layers *.Cu *.Mask) - (net 385 "Net-(C67-Pad1)")) + (net 381 "Net-(C67-Pad1)")) (pad 10 thru_hole oval (at 9.9 -0.75 270) (size 1.2 2.4) (drill oval 0.6 1.7) (layers *.Cu *.Mask) - (net 385 "Net-(C67-Pad1)")) + (net 381 "Net-(C67-Pad1)")) (pad 9 thru_hole circle (at -0.5 -1.5 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) - (net 199 "Net-(C42-Pad2)")) + (net 195 "Net-(C42-Pad2)")) (pad 8 thru_hole circle (at 1.5 -1.5 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) - (net 195 "Net-(C40-Pad2)")) + (net 191 "Net-(C40-Pad2)")) (pad 7 thru_hole circle (at 3.5 -1.5 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) (net 15 GND)) (pad 6 thru_hole circle (at 5.5 -1.5 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) - (net 217 USB3_1_SSRXP)) + (net 213 USB3_1_SSRXP)) (pad 5 thru_hole circle (at 7.5 -1.5 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) - (net 218 USB3_1_SSRXN)) + (net 214 USB3_1_SSRXN)) (pad 4 thru_hole circle (at 7 0 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) (net 15 GND)) (pad 3 thru_hole circle (at 4.5 0 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) - (net 219 USB3_1_DP)) + (net 215 USB3_1_DP)) (pad 2 thru_hole circle (at 2.5 0 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) - (net 220 USB3_1_DN)) + (net 216 USB3_1_DN)) (pad 1 thru_hole circle (at 0 0 270) (size 1.2 1.2) (drill 0.7) (layers *.Cu *.Mask) - (net 377 "Net-(C69-Pad1)")) + (net 373 "Net-(C69-Pad1)")) (model ${KIPRJMOD}/3d-models/483930001.stp (offset (xyz 3.5 -11.65 0.25)) (scale (xyz 1 1 1)) @@ -14457,7 +14167,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 283 "Net-(C58-Pad1)")) + (net 279 "Net-(C58-Pad1)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 23 +3V3)) (model ${KISYS3DMOD}/Inductor_SMD.3dshapes/L_0603_1608Metric.wrl @@ -14493,7 +14203,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 282 "Net-(C52-Pad1)")) + (net 278 "Net-(C52-Pad1)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 23 +3V3)) (model ${KISYS3DMOD}/Inductor_SMD.3dshapes/L_0603_1608Metric.wrl @@ -14529,9 +14239,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 376 "Net-(C90-Pad1)")) + (net 372 "Net-(C90-Pad1)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 192 +1V1)) + (net 188 +1V1)) (model ${KISYS3DMOD}/Inductor_SMD.3dshapes/L_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -14565,7 +14275,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 701 "Net-(C86-Pad1)")) + (net 567 "Net-(C86-Pad1)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 23 +3V3)) (model ${KISYS3DMOD}/Inductor_SMD.3dshapes/L_0603_1608Metric.wrl @@ -14601,9 +14311,9 @@ (fp_line (start -3.6775 -2.56) (end 3.6775 -2.56) (layer F.Fab) (width 0.1)) (fp_line (start -3.6775 2.56) (end -3.6775 -2.56) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 3.3875 0) (size 1.925 5.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.12987) - (net 211 "Net-(F2-Pad2)")) + (net 207 "Net-(F2-Pad2)")) (pad 1 smd roundrect (at -3.3875 0) (size 1.925 5.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.12987) - (net 361 BAT1+)) + (net 357 BAT1+)) (model ${KISYS3DMOD}/Fuse.3dshapes/Fuse_2920_7451Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -14637,9 +14347,9 @@ (fp_line (start -3.6775 -2.56) (end 3.6775 -2.56) (layer F.Fab) (width 0.1)) (fp_line (start -3.6775 2.56) (end -3.6775 -2.56) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 3.3875 0) (size 1.925 5.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.12987) - (net 187 +36V)) + (net 183 +36V)) (pad 1 smd roundrect (at -3.3875 0) (size 1.925 5.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.12987) - (net 210 "Net-(F1-Pad1)")) + (net 206 "Net-(F1-Pad1)")) (model ${KISYS3DMOD}/Fuse.3dshapes/Fuse_2920_7451Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -14675,9 +14385,9 @@ (fp_line (start -0.5 -0.4) (end -0.8 -0.1) (layer F.Fab) (width 0.1)) (fp_line (start 0.8 -0.4) (end -0.5 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 208 "Net-(D22-Pad2)")) + (net 204 "Net-(D22-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 209 "Net-(D22-Pad1)")) + (net 205 "Net-(D22-Pad1)")) (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -14718,9 +14428,9 @@ (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 smd rect (at -0.7 0 90) (size 0.6 0.7) (layers F.Cu F.Paste F.Mask) - (net 205 "Net-(D19-Pad1)")) + (net 201 "Net-(D19-Pad1)")) (pad 2 smd rect (at 0.7 0 90) (size 0.6 0.7) (layers F.Cu F.Paste F.Mask) - (net 206 "Net-(D19-Pad2)")) + (net 202 "Net-(D19-Pad2)")) (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SOD-523.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -14764,7 +14474,7 @@ (pad 2 smd rect (at 1.65 0 90) (size 0.9 1.2) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 1 smd rect (at -1.65 0 90) (size 0.9 1.2) (layers F.Cu F.Paste F.Mask) - (net 33 "Net-(D1-Pad1)")) + (net 32 "Net-(D1-Pad1)")) (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SOD-123.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -14798,9 +14508,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 123 USB1_TX_N)) + (net 120 USB1_TX_N)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 203 "Net-(C45-Pad1)")) + (net 199 "Net-(C45-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -14834,9 +14544,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 124 USB1_TX_P)) + (net 121 USB1_TX_P)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 202 "Net-(C44-Pad1)")) + (net 198 "Net-(C44-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -14872,7 +14582,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 201 USB_PWR)) + (net 197 USB_PWR)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -14906,9 +14616,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 199 "Net-(C42-Pad2)")) + (net 195 "Net-(C42-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 200 USB3_1_SSTXP)) + (net 196 USB3_1_SSTXP)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -14942,9 +14652,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 197 "Net-(C41-Pad2)")) + (net 193 "Net-(C41-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 198 USB3_2_SSTXP)) + (net 194 USB3_2_SSTXP)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -14978,9 +14688,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 195 "Net-(C40-Pad2)")) + (net 191 "Net-(C40-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 196 USB3_1_SSTXN)) + (net 192 USB3_1_SSTXN)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -15014,9 +14724,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 193 "Net-(C39-Pad2)")) + (net 189 "Net-(C39-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 194 USB3_2_SSTXN)) + (net 190 USB3_2_SSTXN)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -15052,7 +14762,7 @@ (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 192 +1V1)) + (net 188 +1V1)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -15088,7 +14798,7 @@ (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 191 +1V2)) + (net 187 +1V2)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -15196,7 +14906,7 @@ (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 190 "Net-(C34-Pad1)")) + (net 186 "Net-(C34-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -15232,7 +14942,7 @@ (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 189 "Net-(C33-Pad1)")) + (net 185 "Net-(C33-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -15268,7 +14978,7 @@ (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 188 "Net-(C32-Pad1)")) + (net 184 "Net-(C32-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -15304,7 +15014,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 187 +36V)) + (net 183 +36V)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -15342,109 +15052,109 @@ (fp_line (start 14.4 -5.1) (end 16.8 -5.1) (layer F.SilkS) (width 0.1524)) (fp_line (start -1 5.1) (end -3.8 5.1) (layer F.SilkS) (width 0.1524)) (pad 2 smd rect (at -9.6 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 282 "Net-(C52-Pad1)")) + (net 278 "Net-(C52-Pad1)")) (pad 1 smd rect (at -10 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 162 "Net-(U11-Pad1)")) + (net 159 "Net-(U11-Pad1)")) (pad 4 smd rect (at -8.8 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 3 smd rect (at -9.2 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 163 "Net-(U11-Pad3)")) + (net 160 "Net-(U11-Pad3)")) (pad 6 smd rect (at -8 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 371 +1V5)) + (net 367 +1V5)) (pad 5 smd rect (at -8.4 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 164 "Net-(U11-Pad5)")) + (net 161 "Net-(U11-Pad5)")) (pad 8 smd rect (at -7.2 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 165 "Net-(U11-Pad8)")) + (net 162 "Net-(U11-Pad8)")) (pad 7 smd rect (at -7.6 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 166 "Net-(U11-Pad7)")) + (net 580 PCIE1_CLKREQn)) (pad 10 smd rect (at -6.4 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 167 "Net-(U11-Pad10)")) + (net 163 "Net-(U11-Pad10)")) (pad 9 smd rect (at -6.8 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 12 smd rect (at -5.6 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 168 "Net-(U11-Pad12)")) + (net 164 "Net-(U11-Pad12)")) (pad 11 smd rect (at -6 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 244 PCIE1_CLK_N)) + (net 240 PCIE1_CLK_N)) (pad 14 smd rect (at -4.8 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 169 "Net-(U11-Pad14)")) + (net 165 "Net-(U11-Pad14)")) (pad 13 smd rect (at -5.2 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 245 PCIE1_CLK_P)) + (net 241 PCIE1_CLK_P)) (pad 16 smd rect (at -4 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 170 "Net-(U11-Pad16)")) + (net 166 "Net-(U11-Pad16)")) (pad 15 smd rect (at -4.4 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 18 smd rect (at 0 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 17 smd rect (at -0.4 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 171 "Net-(U11-Pad17)")) + (net 167 "Net-(U11-Pad17)")) (pad 20 smd rect (at 0.8 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 415 PCIE_WDISn)) + (net 410 PCIE_WDISn)) (pad 19 smd rect (at 0.4 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 172 "Net-(U11-Pad19)")) + (net 168 "Net-(U11-Pad19)")) (pad 22 smd rect (at 1.6 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 277 PCIE_RESETn)) + (net 273 PCIE_RESETn)) (pad 21 smd rect (at 1.2 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 24 smd rect (at 2.4 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 282 "Net-(C52-Pad1)")) + (net 278 "Net-(C52-Pad1)")) (pad 23 smd rect (at 2 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 253 PCIE1_RX_N)) + (net 249 PCIE1_RX_N)) (pad 26 smd rect (at 3.2 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 25 smd rect (at 2.8 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 252 PCIE1_RX_P)) + (net 248 PCIE1_RX_P)) (pad 28 smd rect (at 4 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 371 +1V5)) + (net 367 +1V5)) (pad 27 smd rect (at 3.6 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 30 smd rect (at 4.8 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 173 "Net-(U11-Pad30)")) + (net 169 "Net-(U11-Pad30)")) (pad 29 smd rect (at 4.4 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 32 smd rect (at 5.6 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 174 "Net-(U11-Pad32)")) + (net 170 "Net-(U11-Pad32)")) (pad 31 smd rect (at 5.2 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 255 PCIE1_TX_N)) + (net 251 PCIE1_TX_N)) (pad 34 smd rect (at 6.4 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 33 smd rect (at 6 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 254 PCIE1_TX_P)) + (net 250 PCIE1_TX_P)) (pad 36 smd rect (at 7.2 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 175 "Net-(U11-Pad36)")) + (net 171 "Net-(U11-Pad36)")) (pad 35 smd rect (at 6.8 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 38 smd rect (at 8 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 176 "Net-(U11-Pad38)")) + (net 172 "Net-(U11-Pad38)")) (pad 37 smd rect (at 7.6 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 40 smd rect (at 8.8 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 39 smd rect (at 8.4 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 282 "Net-(C52-Pad1)")) + (net 278 "Net-(C52-Pad1)")) (pad 42 smd rect (at 9.6 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 177 "Net-(U11-Pad42)")) + (net 173 "Net-(U11-Pad42)")) (pad 41 smd rect (at 9.2 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 282 "Net-(C52-Pad1)")) + (net 278 "Net-(C52-Pad1)")) (pad 44 smd rect (at 10.4 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 209 "Net-(D22-Pad1)")) + (net 205 "Net-(D22-Pad1)")) (pad 43 smd rect (at 10 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 46 smd rect (at 11.2 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 178 "Net-(U11-Pad46)")) + (net 174 "Net-(U11-Pad46)")) (pad 45 smd rect (at 10.8 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 179 "Net-(U11-Pad45)")) + (net 175 "Net-(U11-Pad45)")) (pad 48 smd rect (at 12 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 371 +1V5)) + (net 367 +1V5)) (pad 47 smd rect (at 11.6 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 180 "Net-(U11-Pad47)")) + (net 176 "Net-(U11-Pad47)")) (pad 50 smd rect (at 12.8 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 52 smd rect (at 13.6 -4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 282 "Net-(C52-Pad1)")) + (net 278 "Net-(C52-Pad1)")) (pad 49 smd rect (at 12.4 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 181 "Net-(U11-Pad49)")) + (net 177 "Net-(U11-Pad49)")) (pad 51 smd rect (at 13.2 4.1 270) (size 2 0.6) (layers F.Cu F.Paste F.Mask) - (net 182 "Net-(U11-Pad51)")) + (net 178 "Net-(U11-Pad51)")) (pad 53 smd rect (at -12.85 3.5 270) (size 3.2 2.3) (layers F.Cu F.Paste F.Mask)) (pad 54 smd rect (at 16.45 3.5 270) (size 3.2 2.3) (layers F.Cu F.Paste F.Mask)) (pad Hole np_thru_hole circle (at 14.3 0 180) (size 1.1 1.1) (drill 1.1) (layers)) @@ -15498,128 +15208,128 @@ (pad 64 smd rect (at -3.75 -5.7 180) (size 1.5 0.3) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 63 smd rect (at -3.25 -5.7 180) (size 1.5 0.3) (layers F.Cu F.Paste F.Mask) - (net 242 +1V8)) + (net 238 +1V8)) (pad 62 smd rect (at -2.75 -5.7 180) (size 1.5 0.3) (layers F.Cu F.Paste F.Mask) - (net 191 +1V2)) + (net 187 +1V2)) (pad 61 smd rect (at -2.25 -5.7 180) (size 1.5 0.3) (layers F.Cu F.Paste F.Mask) - (net 275 EDP_IRQ)) + (net 271 EDP_IRQ)) (pad 60 smd rect (at -1.75 -5.7 180) (size 1.5 0.3) (layers F.Cu F.Paste F.Mask) - (net 141 "Net-(U10-Pad60)")) + (net 138 "Net-(U10-Pad60)")) (pad 59 smd rect (at -1.25 -5.7 180) (size 1.5 0.3) (layers F.Cu F.Paste F.Mask) - (net 191 +1V2)) + (net 187 +1V2)) (pad 58 smd rect (at -0.75 -5.7 180) (size 1.5 0.3) (layers F.Cu F.Paste F.Mask) - (net 142 "Net-(U10-Pad58)")) + (net 139 "Net-(U10-Pad58)")) (pad 57 smd rect (at -0.25 -5.7 180) (size 1.5 0.3) (layers F.Cu F.Paste F.Mask) - (net 143 "Net-(U10-Pad57)")) + (net 140 "Net-(U10-Pad57)")) (pad 56 smd rect (at 0.25 -5.7 180) (size 1.5 0.3) (layers F.Cu F.Paste F.Mask) - (net 144 "Net-(U10-Pad56)")) + (net 141 "Net-(U10-Pad56)")) (pad 55 smd rect (at 0.75 -5.7 180) (size 1.5 0.3) (layers F.Cu F.Paste F.Mask) - (net 145 "Net-(U10-Pad55)")) + (net 142 "Net-(U10-Pad55)")) (pad 54 smd rect (at 1.25 -5.7 180) (size 1.5 0.3) (layers F.Cu F.Paste F.Mask) - (net 146 "Net-(U10-Pad54)")) + (net 143 "Net-(U10-Pad54)")) (pad 53 smd rect (at 1.75 -5.7 180) (size 1.5 0.3) (layers F.Cu F.Paste F.Mask) - (net 242 +1V8)) + (net 238 +1V8)) (pad 52 smd rect (at 2.25 -5.7 180) (size 1.5 0.3) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 51 smd rect (at 2.75 -5.7 180) (size 1.5 0.3) (layers F.Cu F.Paste F.Mask) - (net 302 "Net-(R77-Pad2)")) + (net 298 "Net-(R77-Pad2)")) (pad 50 smd rect (at 3.25 -5.7 180) (size 1.5 0.3) (layers F.Cu F.Paste F.Mask) - (net 147 "Net-(U10-Pad50)")) + (net 144 "Net-(U10-Pad50)")) (pad 49 smd rect (at 3.75 -5.7 180) (size 1.5 0.3) (layers F.Cu F.Paste F.Mask) - (net 191 +1V2)) + (net 187 +1V2)) (pad 48 smd rect (at 5.7 -3.75 90) (size 1.5 0.3) (layers F.Cu F.Paste F.Mask) - (net 191 +1V2)) + (net 187 +1V2)) (pad 47 smd rect (at 5.7 -3.25 90) (size 1.5 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F.Mask) (roundrect_rratio 0.25) - (net 268 USB3_4_DP)) + (net 264 USB3_4_DP)) (pad 23 smd roundrect (at -0.75 4.4375) (size 0.25 0.875) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 269 USB3_3_SSRXN)) + (net 265 USB3_3_SSRXN)) (pad 22 smd roundrect (at -1.25 4.4375) (size 0.25 0.875) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 270 USB3_3_SSRXP)) + (net 266 USB3_3_SSRXP)) (pad 21 smd roundrect (at -1.75 4.4375) (size 0.25 0.875) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 376 "Net-(C90-Pad1)")) + (net 372 "Net-(C90-Pad1)")) (pad 20 smd roundrect (at -2.25 4.4375) (size 0.25 0.875) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 271 USB3_3_SSTXN)) + (net 267 USB3_3_SSTXN)) (pad 19 smd roundrect (at -2.75 4.4375) (size 0.25 0.875) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 272 USB3_3_SSTXP)) + (net 268 USB3_3_SSTXP)) (pad 18 smd roundrect (at -3.25 4.4375) (size 0.25 0.875) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 273 USB3_3_DN)) + (net 269 USB3_3_DN)) (pad 17 smd roundrect (at -3.75 4.4375) (size 0.25 0.875) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 274 USB3_3_DP)) + (net 270 USB3_3_DP)) (pad 16 smd roundrect (at -4.4375 3.75) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 701 "Net-(C86-Pad1)")) + (net 567 "Net-(C86-Pad1)")) (pad 15 smd roundrect (at -4.4375 3.25) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 213 USB3_2_SSRXN)) + (net 209 USB3_2_SSRXN)) (pad 14 smd roundrect (at -4.4375 2.75) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 212 USB3_2_SSRXP)) + (net 208 USB3_2_SSRXP)) (pad 13 smd roundrect (at -4.4375 2.25) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 376 "Net-(C90-Pad1)")) + (net 372 "Net-(C90-Pad1)")) (pad 12 smd roundrect (at -4.4375 1.75) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 194 USB3_2_SSTXN)) + (net 190 USB3_2_SSTXN)) (pad 11 smd roundrect (at -4.4375 1.25) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 198 USB3_2_SSTXP)) + (net 194 USB3_2_SSTXP)) (pad 10 smd roundrect (at -4.4375 0.75) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 215 USB3_2_DN)) + (net 211 USB3_2_DN)) (pad 9 smd roundrect (at -4.4375 0.25) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 214 USB3_2_DP)) + (net 210 USB3_2_DP)) (pad 8 smd roundrect (at -4.4375 -0.25) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 376 "Net-(C90-Pad1)")) + (net 372 "Net-(C90-Pad1)")) (pad 7 smd roundrect (at -4.4375 -0.75) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 218 USB3_1_SSRXN)) + (net 214 USB3_1_SSRXN)) (pad 6 smd roundrect (at -4.4375 -1.25) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 217 USB3_1_SSRXP)) + (net 213 USB3_1_SSRXP)) (pad 5 smd roundrect (at -4.4375 -1.75) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 376 "Net-(C90-Pad1)")) + (net 372 "Net-(C90-Pad1)")) (pad 4 smd roundrect (at -4.4375 -2.25) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 196 USB3_1_SSTXN)) + (net 192 USB3_1_SSTXN)) (pad 3 smd roundrect (at -4.4375 -2.75) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 200 USB3_1_SSTXP)) + (net 196 USB3_1_SSTXP)) (pad 2 smd roundrect (at -4.4375 -3.25) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 220 USB3_1_DN)) + (net 216 USB3_1_DN)) (pad 1 smd roundrect (at -4.4375 -3.75) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 219 USB3_1_DP)) + (net 215 USB3_1_DP)) (pad "" smd roundrect (at 2.0625 2.0625) (size 1.209339 1.209339) (layers F.Paste) (roundrect_rratio 0.206725)) (pad "" smd roundrect (at 2.0625 0.6875) (size 1.209339 1.209339) (layers F.Paste) (roundrect_rratio 0.206725)) (pad "" smd roundrect (at 2.0625 -0.6875) (size 1.209339 1.209339) (layers F.Paste) (roundrect_rratio 0.206725)) @@ -15892,37 +15602,37 @@ (fp_line (start 2.2 -2.5) (end 2.2 2.5) (layer F.Fab) (width 0.15)) (fp_line (start -1.2 -2.5) (end 2.2 -2.5) (layer F.Fab) (width 0.15)) (pad 16 smd rect (at 2.95 -2.275 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) - (net 89 BATPWR)) + (net 86 BATPWR)) (pad 15 smd rect (at 2.95 -1.625 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) - (net 89 BATPWR)) + (net 86 BATPWR)) (pad 14 smd rect (at 2.95 -0.975 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) - (net 89 BATPWR)) + (net 86 BATPWR)) (pad 13 smd rect (at 2.95 -0.325 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) - (net 137 "Net-(U6-Pad13)")) + (net 134 "Net-(U6-Pad13)")) (pad 12 smd rect (at 2.95 0.325 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) - (net 211 "Net-(F2-Pad2)")) + (net 207 "Net-(F2-Pad2)")) (pad 11 smd rect (at 2.95 0.975 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 10 smd rect (at 2.95 1.625 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) (net 23 +3V3)) (pad 9 smd rect (at 2.95 2.275 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) - (net 295 CHG_SCL)) + (net 291 CHG_SCL)) (pad 8 smd rect (at -2.95 2.275 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) - (net 294 CHG_SDA)) + (net 290 CHG_SDA)) (pad 7 smd rect (at -2.95 1.625 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) - (net 138 "Net-(U6-Pad7)")) + (net 135 "Net-(U6-Pad7)")) (pad 6 smd rect (at -2.95 0.975 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 5 smd rect (at -2.95 0.325 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) - (net 294 CHG_SDA)) + (net 290 CHG_SDA)) (pad 4 smd rect (at -2.95 -0.325 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) - (net 295 CHG_SCL)) + (net 291 CHG_SCL)) (pad 3 smd rect (at -2.95 -0.975 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) - (net 211 "Net-(F2-Pad2)")) + (net 207 "Net-(F2-Pad2)")) (pad 2 smd rect (at -2.95 -1.625 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) - (net 211 "Net-(F2-Pad2)")) + (net 207 "Net-(F2-Pad2)")) (pad 1 smd rect (at -2.95 -2.275 180) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) - (net 211 "Net-(F2-Pad2)")) + (net 207 "Net-(F2-Pad2)")) (model ${KISYS3DMOD}/Package_SO.3dshapes/TSSOP-16_4.4x5mm_P0.65mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -15962,13 +15672,13 @@ (fp_line (start 2.65 -6.4) (end 2.65 6.4) (layer F.Fab) (width 0.1)) (fp_line (start -1.65 -6.4) (end 2.65 -6.4) (layer F.Fab) (width 0.1)) (pad 44 smd rect (at 3.375 -5.25 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 128 BMON_CS)) + (net 125 BMON_CS)) (pad 43 smd rect (at 3.375 -4.75 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 129 BMON_SDO)) + (net 126 BMON_SDO)) (pad 42 smd rect (at 3.375 -4.25 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 130 BMON_SDI)) + (net 127 BMON_SDI)) (pad 41 smd rect (at 3.375 -3.75 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 131 BMON_SCK)) + (net 128 BMON_SCK)) (pad 40 smd rect (at 3.375 -3.25 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 39 smd rect (at 3.375 -2.75 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) @@ -15978,11 +15688,11 @@ (pad 37 smd rect (at 3.375 -1.75 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 36 smd rect (at 3.375 -1.25 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 99 "Net-(R5-Pad2)")) + (net 96 "Net-(R5-Pad2)")) (pad 35 smd rect (at 3.375 -0.75 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 98 "Net-(R4-Pad2)")) + (net 95 "Net-(R4-Pad2)")) (pad 34 smd rect (at 3.375 -0.25 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 100 "Net-(R6-Pad2)")) + (net 97 "Net-(R6-Pad2)")) (pad 33 smd rect (at 3.375 0.25 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 32 smd rect (at 3.375 0.75 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) @@ -15990,63 +15700,63 @@ (pad 31 smd rect (at 3.375 1.25 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) (net 20 "Net-(C4-Pad1)")) (pad 30 smd rect (at 3.375 1.75 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 398 "Net-(R78-Pad1)")) + (net 393 "Net-(R78-Pad1)")) (pad 29 smd rect (at 3.375 2.25 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 399 "Net-(R79-Pad1)")) + (net 394 "Net-(R79-Pad1)")) (pad 28 smd rect (at 3.375 2.75 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 257 "Net-(U4-Pad28)")) + (net 253 "Net-(U4-Pad28)")) (pad 27 smd rect (at 3.375 3.25 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 26 smd rect (at 3.375 3.75 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 25 smd rect (at 3.375 4.25 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 108 "Net-(R24-Pad2)")) + (net 105 "Net-(R24-Pad2)")) (pad 24 smd rect (at 3.375 4.75 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 40 "Net-(D10-Pad1)")) + (net 39 "Net-(D10-Pad1)")) (pad 23 smd rect (at 3.375 5.25 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 107 "Net-(R23-Pad2)")) + (net 104 "Net-(R23-Pad2)")) (pad 22 smd rect (at -3.375 5.25 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 39 "Net-(D8-Pad2)")) + (net 38 "Net-(D8-Pad2)")) (pad 21 smd rect (at -3.375 4.75 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 106 "Net-(R22-Pad2)")) + (net 103 "Net-(R22-Pad2)")) (pad 20 smd rect (at -3.375 4.25 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 38 "Net-(D7-Pad2)")) + (net 37 "Net-(D7-Pad2)")) (pad 19 smd rect (at -3.375 3.75 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 105 "Net-(R21-Pad2)")) + (net 102 "Net-(R21-Pad2)")) (pad 18 smd rect (at -3.375 3.25 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 37 "Net-(D6-Pad2)")) + (net 36 "Net-(D6-Pad2)")) (pad 17 smd rect (at -3.375 2.75 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 104 "Net-(R20-Pad2)")) + (net 101 "Net-(R20-Pad2)")) (pad 16 smd rect (at -3.375 2.25 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 36 "Net-(D5-Pad2)")) + (net 35 "Net-(D5-Pad2)")) (pad 15 smd rect (at -3.375 1.75 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 103 "Net-(R19-Pad2)")) + (net 100 "Net-(R19-Pad2)")) (pad 14 smd rect (at -3.375 1.25 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 35 "Net-(D4-Pad2)")) + (net 34 "Net-(D4-Pad2)")) (pad 13 smd rect (at -3.375 0.75 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 102 "Net-(R18-Pad2)")) + (net 99 "Net-(R18-Pad2)")) (pad 12 smd rect (at -3.375 0.25 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 34 "Net-(D3-Pad2)")) + (net 33 "Net-(D3-Pad2)")) (pad 11 smd rect (at -3.375 -0.25 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 101 "Net-(R17-Pad2)")) + (net 98 "Net-(R17-Pad2)")) (pad 10 smd rect (at -3.375 -0.75 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 204 "Net-(D3-Pad1)")) + (net 200 "Net-(D3-Pad1)")) (pad 9 smd rect (at -3.375 -1.25 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 132 "Net-(U4-Pad9)")) + (net 129 "Net-(U4-Pad9)")) (pad 8 smd rect (at -3.375 -1.75 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 232 "Net-(R52-Pad1)")) + (net 228 "Net-(R52-Pad1)")) (pad 7 smd rect (at -3.375 -2.25 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 133 "Net-(U4-Pad7)")) + (net 130 "Net-(U4-Pad7)")) (pad 6 smd rect (at -3.375 -2.75 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 232 "Net-(R52-Pad1)")) + (net 228 "Net-(R52-Pad1)")) (pad 5 smd rect (at -3.375 -3.25 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 134 "Net-(U4-Pad5)")) + (net 131 "Net-(U4-Pad5)")) (pad 4 smd rect (at -3.375 -3.75 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 232 "Net-(R52-Pad1)")) + (net 228 "Net-(R52-Pad1)")) (pad 3 smd rect (at -3.375 -4.25 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 135 "Net-(U4-Pad3)")) + (net 132 "Net-(U4-Pad3)")) (pad 2 smd rect (at -3.375 -4.75 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) - (net 232 "Net-(R52-Pad1)")) + (net 228 "Net-(R52-Pad1)")) (pad 1 smd rect (at -3.375 -5.25 90) (size 1.25 0.25) (layers F.Cu F.Paste F.Mask) (net 19 "Net-(C2-Pad1)")) (model ${KISYS3DMOD}/Package_SO.3dshapes/SSOP-44_5.3x12.8mm_P0.5mm.wrl @@ -16088,9 +15798,9 @@ (fp_line (start 2.11 -2.61) (end 2.11 -2.135) (layer F.SilkS) (width 0.12)) (fp_line (start 1.635 -2.61) (end 2.11 -2.61) (layer F.SilkS) (width 0.12)) (pad 28 smd roundrect (at -1.25 -2.45) (size 0.25 0.85) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 190 "Net-(C34-Pad1)")) + (net 186 "Net-(C34-Pad1)")) (pad 27 smd roundrect (at -0.75 -2.45) (size 0.25 0.85) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 190 "Net-(C34-Pad1)")) + (net 186 "Net-(C34-Pad1)")) (pad 26 smd roundrect (at -0.25 -2.45) (size 0.25 0.85) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 17 "Net-(C1-Pad2)")) (pad 25 smd roundrect (at 0.25 -2.45) (size 0.25 0.85) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) @@ -16100,47 +15810,47 @@ (pad 23 smd roundrect (at 1.25 -2.45) (size 0.25 0.85) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 22 smd roundrect (at 1.95 -1.75) (size 0.85 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 227 "Net-(Q2-Pad4)")) + (net 223 "Net-(Q2-Pad4)")) (pad 21 smd roundrect (at 1.95 -1.25) (size 0.85 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 76 "Net-(L1-Pad2)")) + (net 75 "Net-(L1-Pad2)")) (pad 20 smd roundrect (at 1.95 -0.75) (size 0.85 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 89 BATPWR)) + (net 86 BATPWR)) (pad 19 smd roundrect (at 1.95 -0.25) (size 0.85 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 89 BATPWR)) + (net 86 BATPWR)) (pad 18 smd roundrect (at 1.95 0.25) (size 0.85 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 17 smd roundrect (at 1.95 0.75) (size 0.85 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 188 "Net-(C32-Pad1)")) + (net 184 "Net-(C32-Pad1)")) (pad 16 smd roundrect (at 1.95 1.25) (size 0.85 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 15 smd roundrect (at 1.95 1.75) (size 0.85 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 14 smd roundrect (at 1.25 2.45) (size 0.25 0.85) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 294 CHG_SDA)) + (net 290 CHG_SDA)) (pad 13 smd roundrect (at 0.75 2.45) (size 0.25 0.85) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 295 CHG_SCL)) + (net 291 CHG_SCL)) (pad 12 smd roundrect (at 0.25 2.45) (size 0.25 0.85) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 11 smd roundrect (at -0.25 2.45) (size 0.25 0.85) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 230 "Net-(R49-Pad1)")) + (net 226 "Net-(R49-Pad1)")) (pad 10 smd roundrect (at -0.75 2.45) (size 0.25 0.85) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 229 "Net-(R3-Pad1)")) + (net 225 "Net-(R3-Pad1)")) (pad 9 smd roundrect (at -1.25 2.45) (size 0.25 0.85) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 228 "Net-(R3-Pad2)")) + (net 224 "Net-(R3-Pad2)")) (pad 8 smd roundrect (at -1.95 1.75) (size 0.85 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 188 "Net-(C32-Pad1)")) + (net 184 "Net-(C32-Pad1)")) (pad 7 smd roundrect (at -1.95 1.25) (size 0.85 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 187 +36V)) + (net 183 +36V)) (pad 6 smd roundrect (at -1.95 0.75) (size 0.85 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 226 "Net-(Q1-Pad4)")) + (net 222 "Net-(Q1-Pad4)")) (pad 5 smd roundrect (at -1.95 0.25) (size 0.85 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 225 "Net-(Q1-Pad5)")) + (net 221 "Net-(Q1-Pad5)")) (pad 4 smd roundrect (at -1.95 -0.25) (size 0.85 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 190 "Net-(C34-Pad1)")) + (net 186 "Net-(C34-Pad1)")) (pad 3 smd roundrect (at -1.95 -0.75) (size 0.85 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 190 "Net-(C34-Pad1)")) + (net 186 "Net-(C34-Pad1)")) (pad 2 smd roundrect (at -1.95 -1.25) (size 0.85 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 189 "Net-(C33-Pad1)")) + (net 185 "Net-(C33-Pad1)")) (pad 1 smd roundrect (at -1.95 -1.75) (size 0.85 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 18 "Net-(C1-Pad1)")) (pad "" smd roundrect (at 0.66 1.22) (size 1.07 0.98) (layers F.Paste) (roundrect_rratio 0.25)) @@ -16186,7 +15896,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 23 +3V3)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 186 HDMI_SDA)) + (net 182 HDMI_SDA)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -16222,7 +15932,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 23 +3V3)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 110 HDMI_SCL)) + (net 107 HDMI_SCL)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -16258,7 +15968,7 @@ (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 23 +3V3)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 109 HDMI_HPD)) + (net 106 HDMI_HPD)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -16294,7 +16004,7 @@ (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 73 "Net-(J4-Pad19)")) + (net 72 "Net-(J4-Pad19)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -16328,9 +16038,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 71 "Net-(J4-Pad16)")) + (net 70 "Net-(J4-Pad16)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 24 +5V)) + (net 197 USB_PWR)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -16364,9 +16074,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 74 "Net-(J4-Pad15)")) + (net 73 "Net-(J4-Pad15)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 24 +5V)) + (net 197 USB_PWR)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -16436,9 +16146,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 26 "Net-(C21-Pad1)")) + (net 25 "Net-(C21-Pad1)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 25 "Net-(C20-Pad1)")) + (net 24 "Net-(C20-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -16472,7 +16182,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 56 "Net-(D18-Pad1)")) + (net 55 "Net-(D18-Pad1)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl @@ -16508,9 +16218,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 54 "Net-(D17-Pad1)")) + (net 53 "Net-(D17-Pad1)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 368 BAT8+)) + (net 364 BAT8+)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -16544,9 +16254,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 52 "Net-(D16-Pad1)")) + (net 51 "Net-(D16-Pad1)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 367 BAT7+)) + (net 363 BAT7+)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -16580,9 +16290,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 50 "Net-(D15-Pad1)")) + (net 49 "Net-(D15-Pad1)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 366 BAT6+)) + (net 362 BAT6+)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -16616,9 +16326,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 48 "Net-(D14-Pad1)")) + (net 47 "Net-(D14-Pad1)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 365 BAT5+)) + (net 361 BAT5+)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -16652,9 +16362,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 46 "Net-(D13-Pad1)")) + (net 45 "Net-(D13-Pad1)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 364 BAT4+)) + (net 360 BAT4+)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -16688,9 +16398,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 44 "Net-(D12-Pad1)")) + (net 43 "Net-(D12-Pad1)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 363 BAT3+)) + (net 359 BAT3+)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -16724,9 +16434,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 42 "Net-(D11-Pad1)")) + (net 41 "Net-(D11-Pad1)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 362 BAT2+)) + (net 358 BAT2+)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -16760,7 +16470,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 55 "Net-(D18-Pad2)")) + (net 54 "Net-(D18-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl @@ -16796,9 +16506,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 53 "Net-(D17-Pad2)")) + (net 52 "Net-(D17-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 368 BAT8+)) + (net 364 BAT8+)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -16832,9 +16542,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 51 "Net-(D16-Pad2)")) + (net 50 "Net-(D16-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 367 BAT7+)) + (net 363 BAT7+)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -16868,9 +16578,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 49 "Net-(D15-Pad2)")) + (net 48 "Net-(D15-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 366 BAT6+)) + (net 362 BAT6+)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -16904,9 +16614,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 47 "Net-(D14-Pad2)")) + (net 46 "Net-(D14-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 365 BAT5+)) + (net 361 BAT5+)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -16940,9 +16650,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 45 "Net-(D13-Pad2)")) + (net 44 "Net-(D13-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 364 BAT4+)) + (net 360 BAT4+)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -16976,9 +16686,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 43 "Net-(D12-Pad2)")) + (net 42 "Net-(D12-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 363 BAT3+)) + (net 359 BAT3+)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -17012,9 +16722,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 41 "Net-(D11-Pad2)")) + (net 40 "Net-(D11-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 362 BAT2+)) + (net 358 BAT2+)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -17048,9 +16758,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 108 "Net-(R24-Pad2)")) + (net 105 "Net-(R24-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 97 "Net-(Q12-Pad1)")) + (net 94 "Net-(Q12-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -17084,9 +16794,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 107 "Net-(R23-Pad2)")) + (net 104 "Net-(R23-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 96 "Net-(Q11-Pad1)")) + (net 93 "Net-(Q11-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -17120,9 +16830,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 106 "Net-(R22-Pad2)")) + (net 103 "Net-(R22-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 95 "Net-(Q10-Pad1)")) + (net 92 "Net-(Q10-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -17156,9 +16866,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 105 "Net-(R21-Pad2)")) + (net 102 "Net-(R21-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 94 "Net-(Q9-Pad1)")) + (net 91 "Net-(Q9-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -17192,9 +16902,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 104 "Net-(R20-Pad2)")) + (net 101 "Net-(R20-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 93 "Net-(Q8-Pad1)")) + (net 90 "Net-(Q8-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -17228,9 +16938,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 103 "Net-(R19-Pad2)")) + (net 100 "Net-(R19-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 92 "Net-(Q7-Pad1)")) + (net 89 "Net-(Q7-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -17264,9 +16974,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 102 "Net-(R18-Pad2)")) + (net 99 "Net-(R18-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 91 "Net-(Q6-Pad1)")) + (net 88 "Net-(Q6-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -17300,9 +17010,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 101 "Net-(R17-Pad2)")) + (net 98 "Net-(R17-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 90 "Net-(Q5-Pad1)")) + (net 87 "Net-(Q5-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -17336,9 +17046,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 40 "Net-(D10-Pad1)")) + (net 39 "Net-(D10-Pad1)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 368 BAT8+)) + (net 364 BAT8+)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -17372,9 +17082,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 39 "Net-(D8-Pad2)")) + (net 38 "Net-(D8-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 367 BAT7+)) + (net 363 BAT7+)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -17408,9 +17118,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 38 "Net-(D7-Pad2)")) + (net 37 "Net-(D7-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 366 BAT6+)) + (net 362 BAT6+)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -17444,9 +17154,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 37 "Net-(D6-Pad2)")) + (net 36 "Net-(D6-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 365 BAT5+)) + (net 361 BAT5+)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -17480,9 +17190,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 36 "Net-(D5-Pad2)")) + (net 35 "Net-(D5-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 364 BAT4+)) + (net 360 BAT4+)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -17516,9 +17226,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 35 "Net-(D4-Pad2)")) + (net 34 "Net-(D4-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 363 BAT3+)) + (net 359 BAT3+)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -17552,9 +17262,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 34 "Net-(D3-Pad2)")) + (net 33 "Net-(D3-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 362 BAT2+)) + (net 358 BAT2+)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -17588,9 +17298,9 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 204 "Net-(D3-Pad1)")) + (net 200 "Net-(D3-Pad1)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 361 BAT1+)) + (net 357 BAT1+)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -17626,7 +17336,7 @@ (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 22 "Net-(C6-Pad1)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 89 BATPWR)) + (net 86 BATPWR)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -17662,7 +17372,7 @@ (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 19 "Net-(C2-Pad1)")) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 33 "Net-(D1-Pad1)")) + (net 32 "Net-(D1-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -17696,7 +17406,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 100 "Net-(R6-Pad2)")) + (net 97 "Net-(R6-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 21 "/Reform 2 Power/VREG")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl @@ -17732,7 +17442,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 99 "Net-(R5-Pad2)")) + (net 96 "Net-(R5-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 21 "/Reform 2 Power/VREG")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl @@ -17768,7 +17478,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 98 "Net-(R4-Pad2)")) + (net 95 "Net-(R4-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 21 "/Reform 2 Power/VREG")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl @@ -17807,11 +17517,11 @@ (effects (font (size 0.5 0.5) (thickness 0.075))) ) (pad 3 smd rect (at 1 0) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 55 "Net-(D18-Pad2)")) + (net 54 "Net-(D18-Pad2)")) (pad 2 smd rect (at -1 0.95) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 368 BAT8+)) + (net 364 BAT8+)) (pad 1 smd rect (at -1 -0.95) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 97 "Net-(Q12-Pad1)")) + (net 94 "Net-(Q12-Pad1)")) (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -17848,11 +17558,11 @@ (effects (font (size 0.5 0.5) (thickness 0.075))) ) (pad 3 smd rect (at 1 0) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 53 "Net-(D17-Pad2)")) + (net 52 "Net-(D17-Pad2)")) (pad 2 smd rect (at -1 0.95) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 367 BAT7+)) + (net 363 BAT7+)) (pad 1 smd rect (at -1 -0.95) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 96 "Net-(Q11-Pad1)")) + (net 93 "Net-(Q11-Pad1)")) (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -17889,11 +17599,11 @@ (effects (font (size 0.5 0.5) (thickness 0.075))) ) (pad 3 smd rect (at 1 0) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 51 "Net-(D16-Pad2)")) + (net 50 "Net-(D16-Pad2)")) (pad 2 smd rect (at -1 0.95) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 366 BAT6+)) + (net 362 BAT6+)) (pad 1 smd rect (at -1 -0.95) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 95 "Net-(Q10-Pad1)")) + (net 92 "Net-(Q10-Pad1)")) (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -17930,11 +17640,11 @@ (effects (font (size 0.5 0.5) (thickness 0.075))) ) (pad 3 smd rect (at 1 0) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 49 "Net-(D15-Pad2)")) + (net 48 "Net-(D15-Pad2)")) (pad 2 smd rect (at -1 0.95) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 365 BAT5+)) + (net 361 BAT5+)) (pad 1 smd rect (at -1 -0.95) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 94 "Net-(Q9-Pad1)")) + (net 91 "Net-(Q9-Pad1)")) (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -17971,11 +17681,11 @@ (effects (font (size 0.5 0.5) (thickness 0.075))) ) (pad 3 smd rect (at 1 0) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 47 "Net-(D14-Pad2)")) + (net 46 "Net-(D14-Pad2)")) (pad 2 smd rect (at -1 0.95) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 364 BAT4+)) + (net 360 BAT4+)) (pad 1 smd rect (at -1 -0.95) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 93 "Net-(Q8-Pad1)")) + (net 90 "Net-(Q8-Pad1)")) (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -18012,11 +17722,11 @@ (effects (font (size 0.5 0.5) (thickness 0.075))) ) (pad 3 smd rect (at 1 0) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 45 "Net-(D13-Pad2)")) + (net 44 "Net-(D13-Pad2)")) (pad 2 smd rect (at -1 0.95) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 363 BAT3+)) + (net 359 BAT3+)) (pad 1 smd rect (at -1 -0.95) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 92 "Net-(Q7-Pad1)")) + (net 89 "Net-(Q7-Pad1)")) (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -18053,11 +17763,11 @@ (effects (font (size 0.5 0.5) (thickness 0.075))) ) (pad 3 smd rect (at 1 0) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 43 "Net-(D12-Pad2)")) + (net 42 "Net-(D12-Pad2)")) (pad 2 smd rect (at -1 0.95) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 362 BAT2+)) + (net 358 BAT2+)) (pad 1 smd rect (at -1 -0.95) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 91 "Net-(Q6-Pad1)")) + (net 88 "Net-(Q6-Pad1)")) (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -18094,11 +17804,11 @@ (effects (font (size 0.5 0.5) (thickness 0.075))) ) (pad 3 smd rect (at 1 0) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 41 "Net-(D11-Pad2)")) + (net 40 "Net-(D11-Pad2)")) (pad 2 smd rect (at -1 0.95) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 361 BAT1+)) + (net 357 BAT1+)) (pad 1 smd rect (at -1 -0.95) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 90 "Net-(Q5-Pad1)")) + (net 87 "Net-(Q5-Pad1)")) (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -18137,39 +17847,39 @@ (fp_line (start 9.25 -1.5) (end 9.25 -13.5) (layer Dwgs.User) (width 0.05)) (fp_circle (center -9.66 6.6) (end -9.46 6.6) (layer F.SilkS) (width 0.4)) (pad 10 thru_hole circle (at 2.035 9.14 270) (size 1.398 1.398) (drill 0.89) (layers *.Cu *.Mask F.SilkS) - (net 77 ETH0_A-)) + (net 76 ETH0_A-)) (pad 11 thru_hole circle (at 4.065 9.14 270) (size 1.398 1.398) (drill 0.89) (layers *.Cu *.Mask F.SilkS) - (net 78 ETH0_A+)) + (net 77 ETH0_A+)) (pad 12 thru_hole circle (at 6.095 9.14 270) (size 1.398 1.398) (drill 0.89) (layers *.Cu *.Mask F.SilkS) - (net 30 "Net-(C26-Pad1)")) + (net 29 "Net-(C26-Pad1)")) (pad 9 thru_hole circle (at -2.035 9.14 270) (size 1.398 1.398) (drill 0.89) (layers *.Cu *.Mask F.SilkS) - (net 79 ETH0_D-)) + (net 78 ETH0_D-)) (pad 8 thru_hole circle (at -4.065 9.14 270) (size 1.398 1.398) (drill 0.89) (layers *.Cu *.Mask F.SilkS) - (net 80 ETH0_D+)) + (net 79 ETH0_D+)) (pad 7 thru_hole circle (at -6.095 9.14 270) (size 1.398 1.398) (drill 0.89) (layers *.Cu *.Mask F.SilkS) - (net 27 "Net-(C23-Pad1)")) + (net 26 "Net-(C23-Pad1)")) (pad 4 thru_hole circle (at 1.015 6.6 270) (size 1.398 1.398) (drill 0.89) (layers *.Cu *.Mask F.SilkS) - (net 81 ETH0_B+)) + (net 80 ETH0_B+)) (pad 3 thru_hole circle (at -1.015 6.6 270) (size 1.398 1.398) (drill 0.89) (layers *.Cu *.Mask F.SilkS) - (net 82 ETH0_C+)) + (net 81 ETH0_C+)) (pad 2 thru_hole circle (at -3.045 6.6 270) (size 1.398 1.398) (drill 0.89) (layers *.Cu *.Mask F.SilkS) - (net 83 ETH0_C-)) + (net 82 ETH0_C-)) (pad 1 thru_hole rect (at -5.075 6.6 270) (size 1.398 1.398) (drill 0.89) (layers *.Cu *.Mask F.SilkS) - (net 28 "Net-(C24-Pad1)")) + (net 27 "Net-(C24-Pad1)")) (pad 5 thru_hole circle (at 3.045 6.6 270) (size 1.398 1.398) (drill 0.89) (layers *.Cu *.Mask F.SilkS) - (net 84 ETH0_B-)) + (net 83 ETH0_B-)) (pad 6 thru_hole circle (at 5.075 6.6 270) (size 1.398 1.398) (drill 0.89) (layers *.Cu *.Mask F.SilkS) - (net 29 "Net-(C25-Pad1)")) + (net 28 "Net-(C25-Pad1)")) (pad 17 thru_hole circle (at 7.52 -8.89 270) (size 1.905 1.905) (drill 1.27) (layers *.Cu *.Mask F.SilkS) - (net 85 ETH0_LED_RX)) + (net 581 ETH0_LED_LINK1)) (pad 16 thru_hole circle (at 7.52 -6.35 270) (size 1.905 1.905) (drill 1.27) (layers *.Cu *.Mask F.SilkS) (net 23 +3V3)) (pad 15 thru_hole circle (at 7.52 -3.81 270) (size 1.905 1.905) (drill 1.27) (layers *.Cu *.Mask F.SilkS) - (net 86 "Net-(P1-Pad15)")) + (net 582 ETH0_LED_LINK2)) (pad 14 thru_hole circle (at -7.52 -8.89 270) (size 1.905 1.905) (drill 1.27) (layers *.Cu *.Mask F.SilkS) (net 23 +3V3)) (pad 13 thru_hole circle (at -7.52 -6.35 270) (size 1.905 1.905) (drill 1.27) (layers *.Cu *.Mask F.SilkS) - (net 87 ETH0_LED_LINK)) + (net 84 ETH0_LED_RX)) (pad Hole np_thru_hole circle (at 4.825 0 270) (size 3.2 3.2) (drill 3.2) (layers)) (pad Hole np_thru_hole circle (at -4.825 0 270) (size 3.2 3.2) (drill 3.2) (layers)) (pad SH2 thru_hole circle (at 8.79 0 270) (size 2.355 2.355) (drill 1.57) (layers *.Cu *.Mask F.SilkS) @@ -18227,7 +17937,7 @@ (fp_line (start -9.05 -1.2) (end -9.05 3.4) (layer F.Fab) (width 0.1)) (fp_line (start 0 -1.2) (end -9.05 -1.2) (layer F.Fab) (width 0.1)) (pad 30 smd rect (at 7.25 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) - (net 57 "Net-(J2-Pad30)")) + (net 56 "Net-(J2-Pad30)")) (pad 29 smd rect (at 6.75 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) (net 23 +3V3)) (pad 28 smd rect (at 6.25 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) @@ -18237,13 +17947,13 @@ (pad 26 smd rect (at 5.25 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) (net 23 +3V3)) (pad 25 smd rect (at 4.75 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) - (net 58 "Net-(J2-Pad25)")) + (net 57 "Net-(J2-Pad25)")) (pad 24 smd rect (at 4.25 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) - (net 59 "Net-(J2-Pad24)")) + (net 58 "Net-(J2-Pad24)")) (pad 23 smd rect (at 3.75 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) - (net 60 "/Reform 2 Display/EDP_BL_PWM")) + (net 59 "/Reform 2 Display/EDP_BL_PWM")) (pad 22 smd rect (at 3.25 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) - (net 61 "/Reform 2 Display/EDP_BL_ENABLE")) + (net 60 "/Reform 2 Display/EDP_BL_ENABLE")) (pad 21 smd rect (at 2.75 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 20 smd rect (at 2.25 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) @@ -18253,13 +17963,13 @@ (pad 18 smd rect (at 1.25 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 17 smd rect (at 0.75 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) - (net 62 "/Reform 2 Display/EDP_HPD")) + (net 61 "/Reform 2 Display/EDP_HPD")) (pad 16 smd rect (at 0.25 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) (net 23 +3V3)) (pad 15 smd rect (at -0.25 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) (net 23 +3V3)) (pad 14 smd rect (at -0.75 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) - (net 63 "/Reform 2 Display/EDP_LCD_TEST")) + (net 62 "/Reform 2 Display/EDP_LCD_TEST")) (pad 13 smd rect (at -1.25 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) (net 23 +3V3)) (pad 12 smd rect (at -1.75 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) @@ -18267,25 +17977,25 @@ (pad 11 smd rect (at -2.25 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 10 smd rect (at -2.75 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) - (net 64 EDP_AUX_DN)) + (net 63 EDP_AUX_DN)) (pad 9 smd rect (at -3.25 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) - (net 65 EDP_AUX_DP)) + (net 64 EDP_AUX_DP)) (pad 8 smd rect (at -3.75 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 7 smd rect (at -4.25 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) - (net 66 EDP_TX0_DN)) + (net 65 EDP_TX0_DN)) (pad 6 smd rect (at -4.75 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) - (net 67 EDP_TX0_DP)) + (net 66 EDP_TX0_DP)) (pad 5 smd rect (at -5.25 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 4 smd rect (at -5.75 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) - (net 68 EDP_TX1_DN)) + (net 67 EDP_TX1_DN)) (pad 3 smd rect (at -6.25 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) - (net 69 EDP_TX1_DP)) + (net 68 EDP_TX1_DP)) (pad 2 smd rect (at -6.75 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 1 smd rect (at -7.25 -1.85 180) (size 0.3 1.3) (layers F.Cu F.Paste F.Mask) - (net 70 "Net-(J2-Pad1)")) + (net 69 "Net-(J2-Pad1)")) (pad MP smd rect (at -9.15 1.4 180) (size 1.8 2.2) (layers F.Cu F.Paste F.Mask)) (pad MP smd rect (at 9.15 1.4 180) (size 1.8 2.2) (layers F.Cu F.Paste F.Mask)) (model ${KIPRJMOD}/3d-models/FH12-30S-0.5SH.wrl @@ -18320,7 +18030,7 @@ (pad 2 thru_hole oval (at 4.8 0 180) (size 4 1.8) (drill oval 3 0.75) (layers *.Cu *.Mask) (net 15 GND)) (pad 1 thru_hole oval (at 0 -3 90) (size 4 2) (drill oval 3 1) (layers *.Cu *.Mask) - (net 187 +36V)) + (net 183 +36V)) (model ${KIPRJMOD}/3d-models/SW3dPS-rapc722.STEP (offset (xyz 0 1.2 0)) (scale (xyz 1 1 1)) @@ -18356,9 +18066,9 @@ (fp_line (start -0.5 -0.4) (end -0.8 -0.1) (layer F.Fab) (width 0.1)) (fp_line (start 0.8 -0.4) (end -0.5 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 55 "Net-(D18-Pad2)")) + (net 54 "Net-(D18-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 56 "Net-(D18-Pad1)")) + (net 55 "Net-(D18-Pad1)")) (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -18394,9 +18104,9 @@ (fp_line (start -0.5 -0.4) (end -0.8 -0.1) (layer F.Fab) (width 0.1)) (fp_line (start 0.8 -0.4) (end -0.5 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 53 "Net-(D17-Pad2)")) + (net 52 "Net-(D17-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 54 "Net-(D17-Pad1)")) + (net 53 "Net-(D17-Pad1)")) (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -18432,9 +18142,9 @@ (fp_line (start -0.5 -0.4) (end -0.8 -0.1) (layer F.Fab) (width 0.1)) (fp_line (start 0.8 -0.4) (end -0.5 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 51 "Net-(D16-Pad2)")) + (net 50 "Net-(D16-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 52 "Net-(D16-Pad1)")) + (net 51 "Net-(D16-Pad1)")) (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -18470,9 +18180,9 @@ (fp_line (start -0.5 -0.4) (end -0.8 -0.1) (layer F.Fab) (width 0.1)) (fp_line (start 0.8 -0.4) (end -0.5 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 49 "Net-(D15-Pad2)")) + (net 48 "Net-(D15-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 50 "Net-(D15-Pad1)")) + (net 49 "Net-(D15-Pad1)")) (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -18508,9 +18218,9 @@ (fp_line (start -0.5 -0.4) (end -0.8 -0.1) (layer F.Fab) (width 0.1)) (fp_line (start 0.8 -0.4) (end -0.5 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 47 "Net-(D14-Pad2)")) + (net 46 "Net-(D14-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 48 "Net-(D14-Pad1)")) + (net 47 "Net-(D14-Pad1)")) (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -18546,9 +18256,9 @@ (fp_line (start -0.5 -0.4) (end -0.8 -0.1) (layer F.Fab) (width 0.1)) (fp_line (start 0.8 -0.4) (end -0.5 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 45 "Net-(D13-Pad2)")) + (net 44 "Net-(D13-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 46 "Net-(D13-Pad1)")) + (net 45 "Net-(D13-Pad1)")) (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -18584,9 +18294,9 @@ (fp_line (start -0.5 -0.4) (end -0.8 -0.1) (layer F.Fab) (width 0.1)) (fp_line (start 0.8 -0.4) (end -0.5 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 43 "Net-(D12-Pad2)")) + (net 42 "Net-(D12-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 44 "Net-(D12-Pad1)")) + (net 43 "Net-(D12-Pad1)")) (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -18622,9 +18332,9 @@ (fp_line (start -0.5 -0.4) (end -0.8 -0.1) (layer F.Fab) (width 0.1)) (fp_line (start 0.8 -0.4) (end -0.5 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 41 "Net-(D11-Pad2)")) + (net 40 "Net-(D11-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 42 "Net-(D11-Pad1)")) + (net 41 "Net-(D11-Pad1)")) (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -18667,7 +18377,7 @@ (pad 2 smd rect (at 1.05 0 180) (size 0.6 0.45) (layers F.Cu F.Paste F.Mask) (net 15 GND)) (pad 1 smd rect (at -1.05 0 180) (size 0.6 0.45) (layers F.Cu F.Paste F.Mask) - (net 40 "Net-(D10-Pad1)")) + (net 39 "Net-(D10-Pad1)")) (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SOD-323.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -18708,9 +18418,9 @@ (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 1.05 0) (size 0.6 0.45) (layers F.Cu F.Paste F.Mask) - (net 40 "Net-(D10-Pad1)")) + (net 39 "Net-(D10-Pad1)")) (pad 1 smd rect (at -1.05 0) (size 0.6 0.45) (layers F.Cu F.Paste F.Mask) - (net 39 "Net-(D8-Pad2)")) + (net 38 "Net-(D8-Pad2)")) (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SOD-323.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -18751,9 +18461,9 @@ (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 1.05 0 180) (size 0.6 0.45) (layers F.Cu F.Paste F.Mask) - (net 39 "Net-(D8-Pad2)")) + (net 38 "Net-(D8-Pad2)")) (pad 1 smd rect (at -1.05 0 180) (size 0.6 0.45) (layers F.Cu F.Paste F.Mask) - (net 38 "Net-(D7-Pad2)")) + (net 37 "Net-(D7-Pad2)")) (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SOD-323.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -18794,9 +18504,9 @@ (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 1.05 0) (size 0.6 0.45) (layers F.Cu F.Paste F.Mask) - (net 38 "Net-(D7-Pad2)")) + (net 37 "Net-(D7-Pad2)")) (pad 1 smd rect (at -1.05 0) (size 0.6 0.45) (layers F.Cu F.Paste F.Mask) - (net 37 "Net-(D6-Pad2)")) + (net 36 "Net-(D6-Pad2)")) (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SOD-323.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -18837,9 +18547,9 @@ (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 1.05 0) (size 0.6 0.45) (layers F.Cu F.Paste F.Mask) - (net 37 "Net-(D6-Pad2)")) + (net 36 "Net-(D6-Pad2)")) (pad 1 smd rect (at -1.05 0) (size 0.6 0.45) (layers F.Cu F.Paste F.Mask) - (net 36 "Net-(D5-Pad2)")) + (net 35 "Net-(D5-Pad2)")) (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SOD-323.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -18880,9 +18590,9 @@ (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 1.05 0 180) (size 0.6 0.45) (layers F.Cu F.Paste F.Mask) - (net 36 "Net-(D5-Pad2)")) + (net 35 "Net-(D5-Pad2)")) (pad 1 smd rect (at -1.05 0 180) (size 0.6 0.45) (layers F.Cu F.Paste F.Mask) - (net 35 "Net-(D4-Pad2)")) + (net 34 "Net-(D4-Pad2)")) (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SOD-323.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -18923,9 +18633,9 @@ (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 1.05 0) (size 0.6 0.45) (layers F.Cu F.Paste F.Mask) - (net 35 "Net-(D4-Pad2)")) + (net 34 "Net-(D4-Pad2)")) (pad 1 smd rect (at -1.05 0) (size 0.6 0.45) (layers F.Cu F.Paste F.Mask) - (net 34 "Net-(D3-Pad2)")) + (net 33 "Net-(D3-Pad2)")) (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SOD-323.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -18966,9 +18676,9 @@ (effects (font (size 1 1) (thickness 0.15))) ) (pad 2 smd rect (at 1.05 0 180) (size 0.6 0.45) (layers F.Cu F.Paste F.Mask) - (net 34 "Net-(D3-Pad2)")) + (net 33 "Net-(D3-Pad2)")) (pad 1 smd rect (at -1.05 0 180) (size 0.6 0.45) (layers F.Cu F.Paste F.Mask) - (net 204 "Net-(D3-Pad1)")) + (net 200 "Net-(D3-Pad1)")) (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SOD-323.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -19004,7 +18714,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 32 "Net-(C30-Pad1)")) + (net 31 "Net-(C30-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -19074,7 +18784,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 24 +5V)) + (net 197 USB_PWR)) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl @@ -19110,7 +18820,7 @@ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 31 "Net-(C27-Pad2)")) + (net 30 "Net-(C27-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl @@ -19148,7 +18858,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 30 "Net-(C26-Pad1)")) + (net 29 "Net-(C26-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -19184,7 +18894,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 29 "Net-(C25-Pad1)")) + (net 28 "Net-(C25-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -19220,7 +18930,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 28 "Net-(C24-Pad1)")) + (net 27 "Net-(C24-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -19256,7 +18966,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 27 "Net-(C23-Pad1)")) + (net 26 "Net-(C23-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -19328,7 +19038,7 @@ (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 26 "Net-(C21-Pad1)")) + (net 25 "Net-(C21-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -19364,7 +19074,7 @@ (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 25 "Net-(C20-Pad1)")) + (net 24 "Net-(C20-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -19400,7 +19110,7 @@ (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 368 BAT8+)) + (net 364 BAT8+)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -19436,7 +19146,7 @@ (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 367 BAT7+)) + (net 363 BAT7+)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -19472,7 +19182,7 @@ (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 366 BAT6+)) + (net 362 BAT6+)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -19508,7 +19218,7 @@ (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 365 BAT5+)) + (net 361 BAT5+)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -19544,7 +19254,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 364 BAT4+)) + (net 360 BAT4+)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -19580,7 +19290,7 @@ (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 363 BAT3+)) + (net 359 BAT3+)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -19616,7 +19326,7 @@ (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 362 BAT2+)) + (net 358 BAT2+)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -19652,7 +19362,7 @@ (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 GND)) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 361 BAT1+)) + (net 357 BAT1+)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -19876,6 +19586,18 @@ ) ) + (dimension 42 (width 0.15) (layer Dwgs.User) + (gr_text "42.000 mm" (at 183.5 34.7) (layer Dwgs.User) + (effects (font (size 1 1) (thickness 0.15))) + ) + (feature1 (pts (xy 204.5 38.5) (xy 204.5 35.413579))) + (feature2 (pts (xy 162.5 38.5) (xy 162.5 35.413579))) + (crossbar (pts (xy 162.5 36) (xy 204.5 36))) + (arrow1a (pts (xy 204.5 36) (xy 203.373496 36.586421))) + (arrow1b (pts (xy 204.5 36) (xy 203.373496 35.413579))) + (arrow2a (pts (xy 162.5 36) (xy 163.626504 36.586421))) + (arrow2b (pts (xy 162.5 36) (xy 163.626504 35.413579))) + ) (gr_text DAC (at 281.5 95 90) (layer Dwgs.User) (tstamp 5D2778E5) (effects (font (size 1 1) (thickness 0.15))) ) diff --git a/reform2-motherboard/reform2-motherboard/reform2-motherboard.sch b/reform2-motherboard/reform2-motherboard/reform2-motherboard.sch @@ -6,45 +6,45 @@ $Descr A2 23386 16535 encoding utf-8 Sheet 1 9 Title "MNT Reform 2" -Date "2019-07-03" -Rev "0.1" +Date "2019-07-09" +Rev "0.1.1" Comp "MNT Research GmbH" Comment1 "https://mntre.com" Comment2 "Engineer: Lukas F. Hartmann" Comment3 "License: GPL v3+" Comment4 "" $EndDescr -Text GLabel -2350 11950 0 50 Input ~ 0 +Text GLabel 9150 5100 2 50 Output ~ 0 HDMI_D0+ -Text GLabel -2350 12050 0 50 Input ~ 0 +Text GLabel 9150 5200 2 50 Output ~ 0 HDMI_D0- -Text GLabel -2350 12150 0 50 Input ~ 0 +Text GLabel 9150 4800 2 50 Output ~ 0 HDMI_D3+ -Text GLabel -2350 12250 0 50 Input ~ 0 +Text GLabel 9150 4900 2 50 Output ~ 0 HDMI_D3- -Text GLabel -2350 11300 0 50 Input ~ 0 +Text GLabel 9150 5700 2 50 Output ~ 0 HDMI_D2+ -Text GLabel -2350 11650 0 50 Input ~ 0 +Text GLabel 9150 5800 2 50 Output ~ 0 HDMI_D2- -Text GLabel -2350 11750 0 50 Input ~ 0 +Text GLabel 9150 5400 2 50 Output ~ 0 HDMI_D1+ -Text GLabel -2350 11850 0 50 Input ~ 0 +Text GLabel 9150 5500 2 50 Output ~ 0 HDMI_D1- -Text GLabel -2350 14150 0 50 Input ~ 0 +Text GLabel 9150 7500 2 50 BiDi ~ 0 SD2_DATA0 -Text GLabel -2350 14250 0 50 Input ~ 0 +Text GLabel 9150 7600 2 50 BiDi ~ 0 SD2_DATA1 -Text GLabel -2350 13750 0 50 Input ~ 0 +Text GLabel 9150 7700 2 50 BiDi ~ 0 SD2_DATA2 -Text GLabel -2350 13850 0 50 Input ~ 0 +Text GLabel 9150 7800 2 50 BiDi ~ 0 SD2_DATA3 -Text GLabel -2350 13950 0 50 Input ~ 0 +Text GLabel 9150 7400 2 50 Output ~ 0 SD2_CMD -Text GLabel -2350 14050 0 50 Input ~ 0 +Text GLabel 9150 7300 2 50 Output ~ 0 SD2_CLK -Text GLabel -2350 14450 0 50 Input ~ 0 +Text GLabel 7300 6700 0 50 Input ~ 0 SD2_WP -Text GLabel -2350 14350 0 50 Input ~ 0 +Text GLabel 7300 6400 0 50 Input ~ 0 SD2_CD $Sheet S 18750 11100 500 150 @@ -88,17 +88,17 @@ U 5D0D8363 F0 "Reform 2 HDMI" 50 F1 "reform2-hdmi.sch" 50 $EndSheet -Text GLabel -2350 13350 0 50 Output ~ 0 +Text GLabel 9150 12800 2 50 Output ~ 0 USB1_TX_N -Text GLabel -2350 13450 0 50 Output ~ 0 +Text GLabel 9150 12700 2 50 Output ~ 0 USB1_TX_P -Text GLabel -2350 13550 0 50 Output ~ 0 +Text GLabel 9150 12200 2 50 Output ~ 0 USB1_DN -Text GLabel -2350 13650 0 50 Output ~ 0 +Text GLabel 9150 12100 2 50 Output ~ 0 USB1_DP -Text GLabel -2350 13150 0 50 Input ~ 0 +Text GLabel 9150 12500 2 50 Input ~ 0 USB1_RX_N -Text GLabel -2350 13250 0 50 Input ~ 0 +Text GLabel 9150 12400 2 50 Input ~ 0 USB1_RX_P $Sheet S 18750 13900 500 150 @@ -106,89 +106,85 @@ U 5D1F6C04 F0 "Reform 2 Audio" 50 F1 "reform2-audio.sch" 50 $EndSheet -Text GLabel -2350 15550 0 60 Output ~ 0 -ETH0_LED_LINK -Text GLabel -2350 15650 0 60 Output ~ 0 +Text GLabel 9150 4100 2 60 Output ~ 0 +ETH0_LED_LINK1 +Text GLabel 9150 3500 2 60 Output ~ 0 ETH0_LED_RX -Text GLabel -2350 14750 0 60 Output ~ 0 +Text GLabel 9150 4500 2 60 Output ~ 0 ETH0_D- -Text GLabel -2350 14850 0 60 Output ~ 0 +Text GLabel 9150 4600 2 60 Output ~ 0 ETH0_D+ -Text GLabel -2350 14950 0 60 Output ~ 0 +Text GLabel 9150 4200 2 60 Output ~ 0 ETH0_C- -Text GLabel -2350 15050 0 60 Output ~ 0 +Text GLabel 9150 4300 2 60 Output ~ 0 ETH0_C+ -Text GLabel -2350 15150 0 60 Output ~ 0 +Text GLabel 9150 4000 2 60 Output ~ 0 ETH0_B- -Text GLabel -2350 15250 0 60 Output ~ 0 +Text GLabel 9150 3900 2 60 Output ~ 0 ETH0_B+ -Text GLabel -2350 15350 0 60 Output ~ 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+307,31 @@ F 3 "" H 18750 8900 50 0001 C CNN 1 18750 8900 1 0 0 -1 $EndComp -Text GLabel -6400 7950 0 50 Output ~ 0 +Text GLabel 9150 13200 2 50 Output ~ 0 BACKLIGHT_EN -Text GLabel -6400 8250 0 50 Output ~ 0 +Text GLabel 9150 13300 2 50 Output ~ 0 BACKLIGHT_PWM -Text GLabel -6350 13750 0 50 Output ~ 0 +Text GLabel 6800 13200 0 50 Output ~ 0 DAC_TXFS -Text GLabel -6350 13850 0 50 Output ~ 0 +Text GLabel 7250 13400 0 50 Output ~ 0 DAC_DOUT -Text GLabel -6350 13950 0 50 Input ~ 0 +Text GLabel 7250 13500 0 50 Input ~ 0 DAC_DIN -Text GLabel -6350 13650 0 50 Output ~ 0 +Text GLabel 7300 13200 0 50 Output ~ 0 DAC_BCLK -Text GLabel -6350 14050 0 50 Output ~ 0 +Text GLabel 6800 13300 0 50 Output ~ 0 DAC_RXFS -Text GLabel -6350 13550 0 50 Output ~ 0 +Text GLabel 7300 12900 0 50 Output ~ 0 DAC_MCLK -Text GLabel -6350 14150 0 50 Output ~ 0 +Text GLabel 7300 14000 0 50 Output ~ 0 DAC_RXCLK -Text GLabel -6400 12950 0 50 Output ~ 0 +Text GLabel 7300 4600 0 50 Output ~ 0 HDMI_SCL -Text GLabel -6400 13050 0 50 BiDi ~ 0 +Text GLabel 7300 4900 0 50 BiDi ~ 0 HDMI_SDA -Text GLabel -6400 12750 0 50 Input ~ 0 +Text GLabel 9150 5300 2 50 Output ~ 0 HDMI_HPD -Text GLabel -6400 12850 0 50 BiDi ~ 0 +Text GLabel 9150 5000 2 50 BiDi ~ 0 HDMI_CEC $Comp L Connector:Conn_01x03_Male J18 @@ -373,13 +369,9 @@ Wire Wire Line 15000 2800 15000 2700 Wire Wire Line 15000 2700 14900 2700 -Text GLabel -6400 12150 0 50 Output ~ 0 +Text GLabel 7300 8900 0 50 Output ~ 0 IMX_UART1_TX -Text GLabel -6400 12250 0 50 Input ~ 0 -IMX_UART1_RX -Text GLabel -6350 14500 0 50 Output ~ 0 -IMX_UART1_TX -Text GLabel -6350 14600 0 50 Input ~ 0 +Text GLabel 7300 9200 0 50 Input ~ 0 IMX_UART1_RX $Comp L Connector:Conn_01x03_Male J20 @@ -417,9 +409,9 @@ Wire Wire Line 16350 2800 16350 2700 Wire Wire Line 16350 2700 16250 2700 -Text GLabel -2500 6600 0 50 BiDi ~ 0 +Text GLabel 5750 5700 0 50 BiDi ~ 0 DAC_SDA -Text GLabel -2500 6500 0 50 Output ~ 0 +Text GLabel 5750 5400 0 50 Output ~ 0 DAC_SCL $Comp L Timer_RTC:PCF8523T U? @@ -624,9 +616,9 @@ Wire Wire Line Connection ~ 18900 3600 Wire Wire Line 18900 3600 18900 3700 -Text GLabel -6450 11550 0 50 Output ~ 0 +Text GLabel 5750 5300 0 50 Output ~ 0 RTC_SCL -Text GLabel -6450 11650 0 50 BiDi ~ 0 +Text GLabel 5750 5600 0 50 BiDi ~ 0 RTC_SDA $Comp L Switch:SW_Push SW? @@ -688,135 +680,31 @@ Wire Wire Line $Comp L Switch:SW_Push SW? U 1 1 5DC264F3 -P 15650 8100 +P 15650 8300 AR Path="/5CC81028/5DC264F3" Ref="SW?" Part="1" AR Path="/5DC264F3" Ref="SW7" Part="1" -F 0 "SW7" H 15650 8385 50 0000 C CNN -F 1 "SW_Push" H 15650 8294 50 0000 C CNN -F 2 "Button_Switch_SMD:SW_Push_1P1T_NO_CK_KMR2" H 15650 8300 50 0001 C CNN -F 3 "~" H 15650 8300 50 0001 C CNN -F 4 "CK" H 15650 8100 50 0001 C CNN "Manufacturer" -F 5 "KMR2" H 15650 8100 50 0001 C CNN "Manufacturer_No" - 1 15650 8100 +F 0 "SW7" H 15650 8585 50 0000 C CNN +F 1 "SW_Push" H 15650 8494 50 0000 C CNN +F 2 "Button_Switch_SMD:SW_Push_1P1T_NO_CK_KMR2" H 15650 8500 50 0001 C CNN +F 3 "~" H 15650 8500 50 0001 C CNN +F 4 "CK" H 15650 8300 50 0001 C CNN "Manufacturer" +F 5 "KMR2" H 15650 8300 50 0001 C CNN "Manufacturer_No" + 1 15650 8300 1 0 0 -1 $EndComp -Wire Wire Line - 16400 8100 15950 8100 $Comp L power:GND #PWR055 U 1 1 5DC264FE -P 15400 8100 -F 0 "#PWR055" H 15400 7850 50 0001 C CNN -F 1 "GND" V 15405 7972 50 0000 R CNN -F 2 "" H 15400 8100 50 0001 C CNN -F 3 "" H 15400 8100 50 0001 C CNN - 1 15400 8100 +P 15400 8300 +F 0 "#PWR055" H 15400 8050 50 0001 C CNN +F 1 "GND" V 15405 8172 50 0000 R CNN +F 2 "" H 15400 8300 50 0001 C CNN +F 3 "" H 15400 8300 50 0001 C CNN + 1 15400 8300 0 1 1 0 $EndComp Wire Wire Line - 15400 8100 15450 8100 -$Comp -L power:+3V3 #PWR060 -U 1 1 5DC2650A -P 15950 7900 -F 0 "#PWR060" H 15950 7750 50 0001 C CNN -F 1 "+3V3" H 16100 7950 50 0000 C CNN -F 2 "" H 15950 7900 50 0001 C CNN -F 3 "" H 15950 7900 50 0001 C CNN - 1 15950 7900 - 1 0 0 -1 -$EndComp -$Comp -L Device:R_Small R116 -U 1 1 5DC26514 -P 15950 8000 -F 0 "R116" H 16009 8046 50 0000 L CNN -F 1 "10k" H 16009 7955 50 0000 L CNN -F 2 "Resistor_SMD:R_0603_1608Metric" H 15950 8000 50 0001 C CNN -F 3 "~" H 15950 8000 50 0001 C CNN -F 4 "Vishay Dale" H 15950 8000 50 0001 C CNN "Manufacturer" -F 5 "CRCW060310K0JNEAC" H 15950 8000 50 0001 C CNN "Manufacturer_No" - 1 15950 8000 - 1 0 0 -1 -$EndComp -Connection ~ 15950 8100 -Wire Wire Line - 15950 8100 15850 8100 -$Comp -L Switch:SW_DIP_x02 SW4 -U 1 1 5DC76CE0 -P -3350 10400 -F 0 "SW4" H -3350 10767 50 0000 C CNN -F 1 "SW_DIP_x02" H -3350 10676 50 0000 C CNN -F 2 "Button_Switch_SMD:SW_DIP_SPSTx02_Slide_6.7x6.64mm_W8.61mm_P2.54mm_LowProfile" H -3350 10400 50 0001 C CNN -F 3 "~" H -3350 10400 50 0001 C CNN - 1 -3350 10400 - 1 0 0 -1 -$EndComp -Wire Wire Line - -3050 10300 -3050 9500 -Wire Wire Line - -3050 9500 -2350 9500 -Wire Wire Line - -2350 9600 -3000 9600 -Wire Wire Line - -3000 9600 -3000 10400 -$Comp -L Device:R_Small R112 -U 1 1 5DCB70EA -P -3900 10200 -F 0 "R112" H -3841 10246 50 0000 L CNN -F 1 "10k" H -3841 10155 50 0000 L CNN -F 2 "Resistor_SMD:R_0603_1608Metric" H -3900 10200 50 0001 C CNN -F 3 "~" H -3900 10200 50 0001 C CNN -F 4 "Vishay Dale" H -3900 10200 50 0001 C CNN "Manufacturer" -F 5 "CRCW060310K0JNEAC" H -3900 10200 50 0001 C CNN "Manufacturer_No" - 1 -3900 10200 - 1 0 0 -1 -$EndComp -$Comp -L power:+3V3 #PWR049 -U 1 1 5DCB7390 -P -3900 10100 -F 0 "#PWR049" H -3900 9950 50 0001 C CNN -F 1 "+3V3" H -3750 10150 50 0000 C CNN -F 2 "" H -3900 10100 50 0001 C CNN -F 3 "" H -3900 10100 50 0001 C CNN - 1 -3900 10100 - 1 0 0 -1 -$EndComp -$Comp -L Device:R_Small R111 -U 1 1 5DCCBCDE -P -4200 10300 -F 0 "R111" H -4141 10346 50 0000 L CNN -F 1 "10k" H -4141 10255 50 0000 L CNN -F 2 "Resistor_SMD:R_0603_1608Metric" H -4200 10300 50 0001 C CNN -F 3 "~" H -4200 10300 50 0001 C CNN -F 4 "Vishay Dale" H -4200 10300 50 0001 C CNN "Manufacturer" -F 5 "CRCW060310K0JNEAC" H -4200 10300 50 0001 C CNN "Manufacturer_No" - 1 -4200 10300 - 1 0 0 -1 -$EndComp -$Comp -L power:+3V3 #PWR048 -U 1 1 5DCF682B -P -4200 10100 -F 0 "#PWR048" H -4200 9950 50 0001 C CNN -F 1 "+3V3" H -4050 10150 50 0000 C CNN -F 2 "" H -4200 10100 50 0001 C CNN -F 3 "" H -4200 10100 50 0001 C CNN - 1 -4200 10100 - 1 0 0 -1 -$EndComp -Wire Wire Line - -3900 10300 -3650 10300 -Wire Wire Line - -3050 10400 -3000 10400 -Wire Wire Line - -4200 10400 -3650 10400 -Wire Wire Line - -4200 10200 -4200 10100 + 15400 8300 15450 8300 $Comp L Connector:Conn_ARM_JTAG_SWD_10 J19 U 1 1 5E0FDF75 @@ -861,72 +749,41 @@ Text GLabel 17250 4400 2 50 Output ~ 0 IMX_JTAG_RSTn Wire Wire Line 15950 4400 16700 4400 -Text GLabel -2500 7400 0 50 Output ~ 0 +Text GLabel 9150 6800 2 50 Output ~ 0 IMX_JTAG_TDI -Text GLabel -2500 7300 0 50 Input ~ 0 +Text GLabel 9150 6900 2 50 Input ~ 0 IMX_JTAG_TDO -Text GLabel -2500 7500 0 50 Input ~ 0 +Text GLabel 9150 6700 2 50 Input ~ 0 IMX_JTAG_TMS -Text GLabel -2500 7600 0 50 Input ~ 0 +Text GLabel 9150 6600 2 50 Input ~ 0 IMX_JTAG_TCK -Text GLabel -2500 7200 0 50 Input ~ 0 +Text GLabel 9150 6100 2 50 Input ~ 0 IMX_JTAG_RSTn $Comp -L power:GND #PWR025 -U 1 1 5E27D226 -P -4200 7350 -F 0 "#PWR025" H -4200 7100 50 0001 C CNN -F 1 "GND" H -4195 7177 50 0000 C CNN -F 2 "" H -4200 7350 50 0001 C CNN -F 3 "" H -4200 7350 50 0001 C CNN - 1 -4200 7350 - 1 0 0 -1 -$EndComp -$Comp -L Switch:SW_DIP_x01 SW3 -U 1 1 5E29784D -P -3900 7100 -F 0 "SW3" H -3900 7367 50 0000 C CNN -F 1 "SW_DIP_x01" H -3900 7276 50 0000 C CNN -F 2 "Button_Switch_SMD:SW_DIP_SPSTx01_Slide_6.7x4.1mm_W8.61mm_P2.54mm_LowProfile" H -3900 7100 50 0001 C CNN -F 3 "~" H -3900 7100 50 0001 C CNN - 1 -3900 7100 - 1 0 0 -1 -$EndComp -$Comp L Device:R_Small R113 U 1 1 5E2AEC8A -P -3550 6900 -F 0 "R113" H -3609 6854 50 0000 R CNN -F 1 "10k" H -3609 6945 50 0000 R CNN -F 2 "Resistor_SMD:R_0603_1608Metric" H -3550 6900 50 0001 C CNN -F 3 "~" H -3550 6900 50 0001 C CNN -F 4 "Vishay Dale" H -3550 6900 50 0001 C CNN "Manufacturer" -F 5 "CRCW060310K0JNEAC" H -3550 6900 50 0001 C CNN "Manufacturer_No" - 1 -3550 6900 +P 4400 12400 +F 0 "R113" H 4341 12354 50 0000 R CNN +F 1 "10k" H 4341 12445 50 0000 R CNN +F 2 "Resistor_SMD:R_0603_1608Metric" H 4400 12400 50 0001 C CNN +F 3 "~" H 4400 12400 50 0001 C CNN +F 4 "Vishay Dale" H 4400 12400 50 0001 C CNN "Manufacturer" +F 5 "CRCW060310K0JNEAC" H 4400 12400 50 0001 C CNN "Manufacturer_No" + 1 4400 12400 -1 0 0 1 $EndComp -Wire Wire Line - -3600 7100 -3550 7100 -Wire Wire Line - -3550 7100 -3550 7000 -Wire Wire Line - -3550 7100 -2350 7100 -Connection ~ -3550 7100 $Comp L power:+3V3 #PWR051 U 1 1 5E2F5AF5 -P -3550 6800 -F 0 "#PWR051" H -3550 6650 50 0001 C CNN -F 1 "+3V3" H -3535 6973 50 0000 C CNN -F 2 "" H -3550 6800 50 0001 C CNN -F 3 "" H -3550 6800 50 0001 C CNN - 1 -3550 6800 +P 4400 12300 +F 0 "#PWR051" H 4400 12150 50 0001 C CNN +F 1 "+3V3" H 4415 12473 50 0000 C CNN +F 2 "" H 4400 12300 50 0001 C CNN +F 3 "" H 4400 12300 50 0001 C CNN + 1 4400 12300 1 0 0 -1 $EndComp Wire Wire Line - -4200 7100 -4200 7350 -Wire Wire Line 15450 5300 15450 5450 Wire Wire Line 15350 5300 15350 5450 @@ -1050,74 +907,13 @@ Wire Wire Line Wire Wire Line 16700 3850 16700 3950 Connection ~ 16400 3850 -$Comp -L Switch:SW_Push SW? -U 1 1 5E6EC51E -P 15650 7200 -AR Path="/5CC81028/5E6EC51E" Ref="SW?" Part="1" -AR Path="/5E6EC51E" Ref="SW5" Part="1" -F 0 "SW5" H 15650 7485 50 0000 C CNN -F 1 "SW_Push" H 15650 7394 50 0000 C CNN -F 2 "Button_Switch_SMD:SW_Push_1P1T_NO_CK_KMR2" H 15650 7400 50 0001 C CNN -F 3 "~" H 15650 7400 50 0001 C CNN -F 4 "CK" H 15650 7200 50 0001 C CNN "Manufacturer" -F 5 "KMR2" H 15650 7200 50 0001 C CNN "Manufacturer_No" - 1 15650 7200 - 1 0 0 -1 -$EndComp -$Comp -L power:GND #PWR053 -U 1 1 5E6EC529 -P 15400 7200 -F 0 "#PWR053" H 15400 6950 50 0001 C CNN -F 1 "GND" V 15405 7072 50 0000 R CNN -F 2 "" H 15400 7200 50 0001 C CNN -F 3 "" H 15400 7200 50 0001 C CNN - 1 15400 7200 - 0 1 1 0 -$EndComp -Wire Wire Line - 15400 7200 15450 7200 -$Comp -L power:+3V3 #PWR058 -U 1 1 5E6EC534 -P 15950 7000 -F 0 "#PWR058" H 15950 6850 50 0001 C CNN -F 1 "+3V3" H 16100 7050 50 0000 C CNN -F 2 "" H 15950 7000 50 0001 C CNN -F 3 "" H 15950 7000 50 0001 C CNN - 1 15950 7000 - 1 0 0 -1 -$EndComp -$Comp -L Device:R_Small R114 -U 1 1 5E6EC53E -P 15950 7100 -F 0 "R114" H 16009 7146 50 0000 L CNN -F 1 "10k" H 16009 7055 50 0000 L CNN -F 2 "Resistor_SMD:R_0603_1608Metric" H 15950 7100 50 0001 C CNN -F 3 "~" H 15950 7100 50 0001 C CNN -F 4 "Vishay Dale" H 15950 7100 50 0001 C CNN "Manufacturer" -F 5 "CRCW060310K0JNEAC" H 15950 7100 50 0001 C CNN "Manufacturer_No" - 1 15950 7100 - 1 0 0 -1 -$EndComp -Connection ~ 15950 7200 -Wire Wire Line - 15950 7200 15850 7200 -Wire Wire Line - 15950 7200 16400 7200 -Text GLabel 16400 7200 2 50 Output ~ 0 -IMX_POR_B Text GLabel 16400 7650 2 50 Output ~ 0 IMX_RESETn -Text GLabel 16400 8100 2 50 Output ~ 0 +Text GLabel 16400 8300 2 50 Output ~ 0 IMX_ONOFF -Text GLabel -2450 9400 0 50 Input ~ 0 -IMX_POR_B -Text GLabel -2450 9300 0 50 Input ~ 0 +Text GLabel 7250 11900 0 50 Input ~ 0 IMX_RESETn -Text GLabel -2450 9700 0 50 Input ~ 0 +Text GLabel 7250 11600 0 50 Input ~ 0 IMX_ONOFF $Comp L reform2:CL-SOM-iMX8 U1 @@ -1214,4 +1010,667 @@ F 3 "~" H 20050 9100 50 0001 C CNN 1 20050 9100 1 0 0 -1 $EndComp +Wire Wire Line + 7300 6200 7350 6200 +Wire Wire Line + 7350 6300 7300 6300 +Wire Wire Line + 7300 5000 7350 5000 +Wire Wire Line + 7350 5100 7300 5100 +Wire Wire Line + 7300 5900 7350 5900 +Wire Wire Line + 7350 6000 7300 6000 +Wire Wire Line + 7300 5300 7350 5300 +Wire Wire Line + 7350 5400 7300 5400 +Wire Wire Line + 7300 5600 7350 5600 +Wire Wire Line + 7350 5700 7300 5700 +Wire Wire Line + 7300 9600 7350 9600 +Wire Wire Line + 7350 9700 7300 9700 +Wire Wire Line + 7300 9900 7350 9900 +Wire Wire Line + 7350 10000 7300 10000 +Wire Wire Line + 9150 6900 9100 6900 +Wire Wire Line + 9100 6800 9150 6800 +Wire Wire Line + 9150 6700 9100 6700 +Wire Wire Line + 9150 6600 9100 6600 +Wire Wire Line + 7250 12300 7350 12300 +Wire Wire Line + 7350 12400 7250 12400 +Wire Wire Line + 7300 9200 7350 9200 +Wire Wire Line + 7350 9300 7300 9300 +Wire Wire Line + 7250 11700 7350 11700 +Wire Wire Line + 7350 11800 7250 11800 +Wire Wire Line + 7250 12000 7350 12000 +Wire Wire Line + 7350 12100 7250 12100 +$Comp +L power:GND #PWR0102 +U 1 1 5D2EE257 +P 6350 13650 +F 0 "#PWR0102" H 6350 13400 50 0001 C CNN +F 1 "GND" H 6355 13477 50 0000 C CNN +F 2 "" H 6350 13650 50 0001 C CNN +F 3 "" H 6350 13650 50 0001 C CNN + 1 6350 13650 + 1 0 0 -1 +$EndComp +Wire Wire Line + 7350 6100 6350 6100 +Wire Wire Line + 7350 5200 6350 5200 +Wire Wire Line + 6350 5200 6350 6100 +Connection ~ 6350 6100 +Wire Wire Line + 7350 4300 6350 4300 +Wire Wire Line + 6350 4300 6350 5200 +Connection ~ 6350 5200 +Wire Wire Line + 7350 3400 6350 3400 +Wire Wire Line + 6350 3400 6350 4300 +Connection ~ 6350 4300 +Wire Wire Line + 9150 6100 9100 6100 +Wire Wire Line + 9150 5700 9100 5700 +Wire Wire Line + 9100 5800 9150 5800 +Wire Wire Line + 9150 5400 9100 5400 +Wire Wire Line + 9100 5500 9150 5500 +Wire Wire Line + 9150 5100 9100 5100 +Wire Wire Line + 9150 5200 9100 5200 +Wire Wire Line + 9150 4800 9100 4800 +Wire Wire Line + 9150 4900 9100 4900 +Wire Wire Line + 9150 5000 9100 5000 +Wire Wire Line + 9150 5300 9100 5300 +NoConn ~ 7350 12700 +Wire Wire Line + 7300 4600 7350 4600 +Wire Wire Line + 7300 4900 7350 4900 +Wire Wire Line + 7250 11600 7350 11600 +Wire Wire Line + 7250 11900 7350 11900 +Wire Wire Line + 9150 3600 9100 3600 +Wire Wire Line + 9100 3700 9150 3700 +Wire Wire Line + 9150 3900 9100 3900 +Wire Wire Line + 9150 4000 9100 4000 +Wire Wire Line + 9100 4200 9150 4200 +Wire Wire Line + 9150 4300 9100 4300 +Wire Wire Line + 9150 4500 9100 4500 +Wire Wire Line + 9100 4600 9150 4600 +Wire Wire Line + 9150 4100 9100 4100 +Wire Wire Line + 9150 3500 9100 3500 +$Comp +L power:+3V3 #PWR0103 +U 1 1 5D498676 +P 10250 3150 +F 0 "#PWR0103" H 10250 3000 50 0001 C CNN +F 1 "+3V3" H 10265 3323 50 0000 C CNN +F 2 "" H 10250 3150 50 0001 C CNN +F 3 "" H 10250 3150 50 0001 C CNN + 1 10250 3150 + 1 0 0 -1 +$EndComp +Wire Wire Line + 10250 3150 10250 3800 +Wire Wire Line + 10250 3800 9100 3800 +Wire Wire Line + 9100 4700 10250 4700 +Wire Wire Line + 10250 4700 10250 3800 +Connection ~ 10250 3800 +Wire Wire Line + 9100 5600 10250 5600 +Wire Wire Line + 10250 5600 10250 4700 +Connection ~ 10250 4700 +Wire Wire Line + 9100 6500 10250 6500 +Wire Wire Line + 10250 6500 10250 5600 +Connection ~ 10250 5600 +Wire Wire Line + 9100 7200 10250 7200 +Wire Wire Line + 10250 7200 10250 6500 +Connection ~ 10250 6500 +Wire Wire Line + 9100 8100 10250 8100 +Wire Wire Line + 10250 8100 10250 7200 +Connection ~ 10250 7200 +Wire Wire Line + 9100 9000 10250 9000 +Wire Wire Line + 10250 9000 10250 8100 +Connection ~ 10250 8100 +Wire Wire Line + 9100 9900 10250 9900 +Wire Wire Line + 10250 9900 10250 9000 +Connection ~ 10250 9000 +Wire Wire Line + 9100 10800 10250 10800 +Wire Wire Line + 10250 10800 10250 9900 +Connection ~ 10250 9900 +Wire Wire Line + 9100 11700 10250 11700 +Wire Wire Line + 10250 11700 10250 10800 +Connection ~ 10250 10800 +Wire Wire Line + 9100 12600 10250 12600 +Wire Wire Line + 10250 12600 10250 11700 +Connection ~ 10250 11700 +Wire Wire Line + 9100 13500 10250 13500 +Wire Wire Line + 10250 13500 10250 12600 +Connection ~ 10250 12600 +Wire Wire Line + 9150 7300 9100 7300 +Wire Wire Line + 9100 7400 9150 7400 +Wire Wire Line + 9150 7700 9100 7700 +Wire Wire Line + 9100 7800 9150 7800 +Wire Wire Line + 9150 7500 9100 7500 +Wire Wire Line + 9100 7600 9150 7600 +Wire Wire Line + 9150 11200 9100 11200 +Wire Wire Line + 9100 11300 9150 11300 +Wire Wire Line + 9150 11500 9100 11500 +Wire Wire Line + 9100 11600 9150 11600 +Wire Wire Line + 9150 11900 9100 11900 +Wire Wire Line + 9100 11800 9150 11800 +Wire Wire Line + 9150 12700 9100 12700 +Wire Wire Line + 9100 12800 9150 12800 +Wire Wire Line + 9150 12400 9100 12400 +Wire Wire Line + 9100 12500 9150 12500 +Wire Wire Line + 9150 12200 9100 12200 +Wire Wire Line + 9150 12100 9100 12100 +Wire Wire Line + 9150 13300 9100 13300 +Wire Wire Line + 9150 13200 9100 13200 +NoConn ~ 7350 4200 +NoConn ~ 7350 3800 +NoConn ~ 7350 3700 +NoConn ~ 7350 4400 +NoConn ~ 7350 4500 +NoConn ~ 7350 4800 +NoConn ~ 7350 4700 +Wire Wire Line + 7300 6400 7350 6400 +Wire Wire Line + 7300 6700 7350 6700 +NoConn ~ 7350 7200 +NoConn ~ 7350 7300 +NoConn ~ 7350 7400 +NoConn ~ 7350 7500 +NoConn ~ 7350 7600 +NoConn ~ 7350 7800 +NoConn ~ 7350 8200 +NoConn ~ 7350 8100 +NoConn ~ 7350 8000 +NoConn ~ 7350 7900 +NoConn ~ 7350 8300 +NoConn ~ 7350 8400 +NoConn ~ 7350 8500 +NoConn ~ 7350 8700 +NoConn ~ 7350 9000 +NoConn ~ 7350 10800 +NoConn ~ 7350 10900 +NoConn ~ 7350 11000 +NoConn ~ 7350 11100 +NoConn ~ 7350 11200 +NoConn ~ 7350 11500 +NoConn ~ 7350 13000 +NoConn ~ 7350 13100 +NoConn ~ 9100 12900 +NoConn ~ 9100 13000 +NoConn ~ 9100 10900 +NoConn ~ 9100 10700 +NoConn ~ 9100 10600 +NoConn ~ 9100 10500 +NoConn ~ 9100 10400 +NoConn ~ 9100 10300 +NoConn ~ 9100 10200 +NoConn ~ 9100 10100 +NoConn ~ 9100 10000 +NoConn ~ 9100 9800 +NoConn ~ 9100 9700 +NoConn ~ 9100 9600 +NoConn ~ 9100 9400 +NoConn ~ 9100 9300 +NoConn ~ 9100 9200 +NoConn ~ 9100 9100 +NoConn ~ 9100 9500 +NoConn ~ 9100 8500 +NoConn ~ 9100 8400 +NoConn ~ 9100 8300 +NoConn ~ 9100 8200 +NoConn ~ 9100 7900 +NoConn ~ 9100 8000 +NoConn ~ 9100 8900 +NoConn ~ 9100 8800 +NoConn ~ 9100 8700 +NoConn ~ 9100 8600 +NoConn ~ 9100 7100 +NoConn ~ 9100 7000 +NoConn ~ 9100 11400 +$Comp +L Connector:TestPoint TP8 +U 1 1 5DBAB563 +P 10500 13400 +F 0 "TP8" V 10454 13588 50 0000 L CNN +F 1 "T_PMIC_ON_REQ" V 10545 13588 50 0000 L CNN +F 2 "TestPoint:TestPoint_Pad_1.0x1.0mm" H 10700 13400 50 0001 C CNN +F 3 "~" H 10700 13400 50 0001 C CNN + 1 10500 13400 + 0 1 1 0 +$EndComp +Wire Wire Line + 10500 13400 9100 13400 +$Comp +L Connector:TestPoint TP6 +U 1 1 5DBBBAE9 +P 10500 12000 +F 0 "TP6" V 10454 12188 50 0000 L CNN +F 1 "T_USB1_ID" V 10545 12188 50 0000 L CNN +F 2 "TestPoint:TestPoint_Pad_1.0x1.0mm" H 10700 12000 50 0001 C CNN +F 3 "~" H 10700 12000 50 0001 C CNN + 1 10500 12000 + 0 1 1 0 +$EndComp +Wire Wire Line + 10500 12000 9100 12000 +Text Notes 10750 12200 0 50 ~ 0 +VERIFY +Text GLabel 10600 11100 2 50 Input ~ 0 +USB_PWR +$Comp +L Device:R_Small R111 +U 1 1 5DC1E478 +P 10450 11100 +F 0 "R111" V 10350 11100 50 0000 C CNN +F 1 "0" V 10450 11100 50 0000 C CNN +F 2 "Resistor_SMD:R_0603_1608Metric" H 10450 11100 50 0001 C CNN +F 3 "~" H 10450 11100 50 0001 C CNN + 1 10450 11100 + 0 1 1 0 +$EndComp +Wire Wire Line + 10550 11100 10600 11100 +Wire Wire Line + 10350 11100 9100 11100 +$Comp +L Connector:TestPoint TP9 +U 1 1 5DC3EE9C +P 11100 11000 +F 0 "TP9" V 11054 11188 50 0000 L CNN +F 1 "T_SD2_RESET" V 11145 11188 50 0000 L CNN +F 2 "TestPoint:TestPoint_Pad_1.0x1.0mm" H 11300 11000 50 0001 C CNN +F 3 "~" H 11300 11000 50 0001 C CNN + 1 11100 11000 + 0 1 1 0 +$EndComp +Wire Wire Line + 11100 11000 9100 11000 +$Comp +L Connector:TestPoint TP4 +U 1 1 5DC50C6F +P 10400 6000 +F 0 "TP4" V 10354 6188 50 0000 L CNN +F 1 "T_JTAG_MOD" V 10445 6188 50 0000 L CNN +F 2 "TestPoint:TestPoint_Pad_1.0x1.0mm" H 10600 6000 50 0001 C CNN +F 3 "~" H 10600 6000 50 0001 C CNN + 1 10400 6000 + 0 1 1 0 +$EndComp +Wire Wire Line + 10400 6000 9100 6000 +Text Notes 9150 3400 0 50 ~ 0 +VERIFY +Text GLabel 7300 3600 0 50 Output ~ 0 +PCIE1_CLKREQn +Wire Wire Line + 7350 3600 7300 3600 +Text GLabel 7300 3500 0 50 Output ~ 0 +PCIE2_CLKREQn +Wire Wire Line + 7350 3500 7300 3500 +Wire Wire Line + 5850 5500 5850 5400 +Wire Wire Line + 5850 5400 5750 5400 +Wire Wire Line + 5850 5500 7350 5500 +Wire Wire Line + 5850 5400 5850 5300 +Wire Wire Line + 5850 5300 5750 5300 +Connection ~ 5850 5400 +Wire Wire Line + 5750 5600 5850 5600 +Wire Wire Line + 5850 5600 5850 5700 +Wire Wire Line + 5850 5800 7350 5800 +Wire Wire Line + 5750 5700 5850 5700 +Connection ~ 5850 5700 +Wire Wire Line + 5850 5700 5850 5800 +NoConn ~ 7350 10100 +NoConn ~ 7350 10200 +NoConn ~ 7350 10600 +NoConn ~ 7350 10700 +Text GLabel 9150 6200 2 50 Output ~ 0 +IMX_UART2_TX +Text GLabel 7300 6500 0 50 Output ~ 0 +IMX_UART2_RX +$Comp +L Connector:TestPoint TP7 +U 1 1 5DE7A63E +P 10500 13100 +F 0 "TP7" V 10454 13288 50 0000 L CNN +F 1 "T_PWM3" V 10545 13288 50 0000 L CNN +F 2 "TestPoint:TestPoint_Pad_1.0x1.0mm" H 10700 13100 50 0001 C CNN +F 3 "~" H 10700 13100 50 0001 C CNN + 1 10500 13100 + 0 1 1 0 +$EndComp +Wire Wire Line + 9100 13100 10500 13100 +Wire Wire Line + 6800 13300 6850 13300 +Wire Wire Line + 6800 13200 6850 13200 +Wire Wire Line + 6850 13200 6850 13300 +Connection ~ 6850 13300 +Wire Wire Line + 6850 13300 7350 13300 +Wire Wire Line + 7350 13200 7300 13200 +Wire Wire Line + 7350 13400 7250 13400 +Wire Wire Line + 7250 13500 7350 13500 +Wire Wire Line + 7350 12900 7300 12900 +Wire Wire Line + 9150 6200 9100 6200 +Wire Wire Line + 7350 6500 7300 6500 +Text Notes 4550 11950 0 50 ~ 0 +TODO Must be pulled low through 49.9 Ohms +Wire Notes Line + 5800 12000 5950 12000 +Wire Notes Line + 5950 12300 6650 12300 +Wire Notes Line + 5950 12400 6650 12400 +Wire Notes Line + 5950 12000 5950 12400 +Wire Wire Line + 6350 12200 7350 12200 +Connection ~ 6350 12200 +Wire Wire Line + 6350 12200 6350 13650 +Wire Wire Line + 7350 11300 6350 11300 +Connection ~ 6350 11300 +Wire Wire Line + 6350 11300 6350 12200 +Wire Wire Line + 7350 10400 6350 10400 +Connection ~ 6350 10400 +Wire Wire Line + 6350 10400 6350 11300 +Wire Wire Line + 7350 9400 7300 9400 +Wire Wire Line + 7350 8900 7300 8900 +Wire Wire Line + 7350 9500 6350 9500 +Connection ~ 6350 9500 +Wire Wire Line + 6350 9500 6350 10400 +NoConn ~ 7350 9100 +NoConn ~ 7350 8800 +Wire Wire Line + 7350 8600 6350 8600 +Connection ~ 6350 8600 +Wire Wire Line + 6350 8600 6350 9500 +Wire Wire Line + 6350 6100 6350 6900 +Wire Wire Line + 7350 6900 6350 6900 +Connection ~ 6350 6900 +Wire Wire Line + 6350 6900 6350 7700 +Wire Wire Line + 7350 7700 6350 7700 +Connection ~ 6350 7700 +Wire Wire Line + 6350 7700 6350 8600 +NoConn ~ 7350 9800 +NoConn ~ 9100 5900 +Wire Wire Line + 15850 8300 16400 8300 +Text Notes 15800 8500 0 50 ~ 0 +has internal 100k pullup +Text GLabel 9150 4400 2 60 Output ~ 0 +ETH0_LED_LINK2 +Wire Wire Line + 9150 4400 9100 4400 +Text GLabel 7300 4100 0 50 Input ~ 0 +LPC_MISO +Text GLabel 7300 3900 0 50 Output ~ 0 +LPC_MOSI +Text GLabel 7300 4000 0 50 Output ~ 0 +LPC_SCK +Wire Wire Line + 7300 4100 7350 4100 +Wire Wire Line + 7350 4000 7300 4000 +Wire Wire Line + 7300 3900 7350 3900 +Wire Wire Line + 7300 7000 7350 7000 +Wire Wire Line + 7300 7100 7350 7100 +Text Notes 5300 5200 0 50 ~ 0 +VERIFY PULLUPS +Text Notes 6750 14200 0 50 ~ 0 +TODO DAC RXCLK? +Wire Wire Line + 5200 12600 7350 12600 +Wire Wire Line + 4600 12600 4400 12600 +$Comp +L Switch:SW_DIP_x01 SW3 +U 1 1 5E29784D +P 4900 12600 +F 0 "SW3" H 4900 12867 50 0000 C CNN +F 1 "SW_DIP_x01" H 4900 12776 50 0000 C CNN +F 2 "Button_Switch_SMD:SW_DIP_SPSTx01_Slide_6.7x4.1mm_W8.61mm_P2.54mm_LowProfile" H 4900 12600 50 0001 C CNN +F 3 "~" H 4900 12600 50 0001 C CNN + 1 4900 12600 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4400 12600 4400 12500 +$Comp +L Device:R_Small R112 +U 1 1 5E367CB7 +P 4100 12700 +F 0 "R112" H 4041 12654 50 0000 R CNN +F 1 "10k" H 4041 12745 50 0000 R CNN +F 2 "Resistor_SMD:R_0603_1608Metric" H 4100 12700 50 0001 C CNN +F 3 "~" H 4100 12700 50 0001 C CNN +F 4 "Vishay Dale" H 4100 12700 50 0001 C CNN "Manufacturer" +F 5 "CRCW060310K0JNEAC" H 4100 12700 50 0001 C CNN "Manufacturer_No" + 1 4100 12700 + -1 0 0 1 +$EndComp +Wire Wire Line + 7350 12800 4100 12800 +$Comp +L power:+3V3 #PWR0104 +U 1 1 5E37CA94 +P 4100 12300 +F 0 "#PWR0104" H 4100 12150 50 0001 C CNN +F 1 "+3V3" H 4115 12473 50 0000 C CNN +F 2 "" H 4100 12300 50 0001 C CNN +F 3 "" H 4100 12300 50 0001 C CNN + 1 4100 12300 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4100 12300 4100 12600 +Text Notes 4450 13200 0 50 ~ 0 +TODO coin cell instead of our own RTC +Wire Notes Line + 5500 13050 5500 12500 +Wire Notes Line + 5500 12500 7200 12500 +Text GLabel 10600 12300 2 50 Input ~ 0 +USB_PWR +$Comp +L Device:R_Small R114 +U 1 1 5E3A8EBA +P 10450 12300 +F 0 "R114" V 10350 12300 50 0000 C CNN +F 1 "0" V 10450 12300 50 0000 C CNN +F 2 "Resistor_SMD:R_0603_1608Metric" H 10450 12300 50 0001 C CNN +F 3 "~" H 10450 12300 50 0001 C CNN + 1 10450 12300 + 0 1 1 0 +$EndComp +Wire Wire Line + 10550 12300 10600 12300 +Wire Wire Line + 10350 12300 9100 12300 +Text Notes 9950 2850 0 50 ~ 0 +TODO ACTUALLY 4.2V +$Bitmap +Pos 22250 15100 +Scale 1.000000 +Data +89 50 4E 47 0D 0A 1A 0A 00 00 00 0D 49 48 44 52 00 00 01 2C 00 00 00 70 08 06 00 00 00 A4 46 4D +4D 00 00 00 04 73 42 49 54 08 08 08 08 7C 08 64 88 00 00 06 2D 49 44 41 54 78 9C ED DD BB 8B 1D +65 1C 87 F1 67 77 45 B1 08 82 26 F1 D2 6A 5A FF 00 0B B5 16 4C 36 12 5D 2F 9D 69 BC 04 0D 5E 62 +A3 A4 B1 D0 CE 4B C4 24 42 2A 05 03 21 85 FA 07 68 B4 8A 60 67 21 12 6D 04 0D 1A 90 04 4C 97 B5 +98 19 CE 64 F7 9C 39 B7 77 DE DF 7B F6 3C 1F 38 EC 16 CB EC 97 2D 1E 66 66 77 CF 80 24 49 92 24 +49 92 24 49 92 24 49 92 24 49 92 24 49 92 24 49 92 24 49 92 24 49 92 24 49 52 42 8F 00 7B A2 47 +B4 1C 8A 1E D0 F2 10 70 5F F4 08 49 03 C7 81 B3 94 13 AD 3F 80 67 A2 47 D4 8E 02 DF 60 B4 A4 62 +1C 07 36 29 27 5A D7 81 7F 28 23 5A 47 A9 7E 36 5F 63 B4 A4 22 34 C1 2A 25 5A D7 EB 2D 25 44 AB +09 96 D1 92 0A D1 0E 56 09 D1 6A 82 55 42 B4 DA C1 32 5A 52 01 B6 06 AB 89 D6 EE A0 3D ED 60 45 +47 6B 6B B0 8C 96 14 6C 58 B0 22 A3 B5 35 58 91 D1 1A 16 2C A3 25 05 1A 15 AC A8 68 0D 0B 56 54 +B4 46 05 AB 89 D6 BD 99 F7 48 4B AF 2B 58 11 D1 1A 15 AC 88 68 75 05 6B 13 F8 0A A3 25 65 35 2E +58 B9 A3 D5 15 AC 4D E0 6F F2 45 6B 5C B0 8C 96 94 D9 24 C1 DA 04 BE 24 4F B4 C6 05 2B 67 B4 26 +09 96 D1 92 32 9A 34 58 B9 A2 35 49 B0 9A 68 3D DD F3 96 49 83 65 B4 34 97 5B A2 07 EC 50 1B F5 +C7 23 54 F7 93 22 ED 06 3E 66 70 C9 1A ED 71 AA 2D 2F 00 7F F6 F4 3D 1E 05 6E ED E9 D8 7D B8 54 +BF 34 86 C1 EA 4F 69 D1 3A 51 7F 5E 42 B4 F6 D7 1F FB 8A D6 67 C4 FF 27 C2 34 DE AB 5F 1A C3 60 +F5 CB 68 8D D6 67 B4 76 01 77 24 3E 66 9F 6E 8B 1E B0 28 56 A3 07 2C 81 0D AA 50 44 FD 45 7C 5B +13 AD 8D 71 5F 98 C9 7E E0 24 DE D3 D2 84 0C 56 1E 1B 54 F7 91 EE 8A 1E C2 E0 9E 96 D1 D2 C2 31 +58 F9 94 14 AD 3D 18 2D 2D 20 83 95 CF 0A D5 9F 17 18 AD E1 8C 96 C6 32 58 79 95 1A AD A7 A2 87 +D4 8C 96 3A 19 AC FC 4A 8C D6 09 8C 96 16 80 C1 8A 61 B4 BA ED 07 3E 05 EE 89 1E A2 B2 18 AC 38 +46 AB DB 01 E0 14 46 4B 2D 06 2B 96 D1 EA D6 5C 1E 1A 2D 01 06 AB 04 4D B4 3E C2 68 0D 73 80 EA +F2 F0 EE E8 21 8A 67 B0 CA B0 42 F5 36 30 46 6B B8 75 AA 33 2D A3 B5 E4 0C 56 39 8C 56 37 A3 25 +83 55 98 52 A3 F5 64 F4 90 9A D1 5A 72 06 AB 3C A5 46 EB 50 F4 90 DA 3A DE D3 5A 5A 06 AB 4C A5 +45 6B 2F F0 09 E5 44 EB 20 46 6B 29 F9 7E 58 E5 6A A2 05 F0 0A 70 25 70 0B 0C A2 05 70 2E 72 48 +ED 60 FD F1 45 E0 72 0F C7 FF 17 F8 BC 87 E3 0E 73 31 D3 F7 D1 12 99 E6 3D DD 53 BE 6E 00 5F 00 +77 6E D9 33 E9 7B BA A7 7E 5D 66 FB 99 D6 34 EF E9 9E FA 75 9E ED 67 5A 7F 25 38 EE 2F A8 38 5E +12 96 AF 7D 79 B8 35 5A 11 BC 3C 54 18 83 B5 18 56 80 67 81 0F 31 5A C3 18 AD 25 E1 3D AC C5 B1 +02 3C 57 7F FE 6A E4 90 5A FB 9E 56 09 DA F7 B4 B4 43 19 AC C5 D2 8E 56 09 67 C7 4D B4 7E 8C 1E +52 6B A2 E5 43 1D 76 28 83 B5 78 DA D1 2A C1 5E E0 B1 E8 11 2D 07 A9 6E 9A 6B 07 32 58 8B 69 25 +7A C0 16 EE 51 16 25 5C 56 48 D2 44 0C 96 A4 85 61 B0 24 2D 0C 83 25 69 61 18 AC FC 4A FA 0D 56 +49 5B A0 BC 3D 2A 8C C1 CA EF 2C F0 5F F4 88 DA EF C0 B7 D1 23 5A CE 01 57 A3 47 A8 5C 06 2B BF +33 C0 DB 94 11 AD 2B C0 61 CA 89 D6 59 E0 4D 8C 96 46 30 58 F9 DD A0 FA 9F C0 52 A2 F5 1B E5 44 +6B 13 38 8D D1 D2 08 06 2B 86 D1 EA 66 B4 34 94 C1 8A 63 B4 BA 19 2D 6D 63 B0 62 19 AD 6E 46 4B +37 31 58 F1 8C 56 B7 D3 C0 31 8C 96 30 58 A5 30 5A DD 8C 96 00 83 55 92 52 A3 F5 5D F4 10 06 BF +3D 3C 06 5C 0B DE A2 40 06 AB 2C 4D B4 DE A1 9C 68 3D 8F D1 52 21 0C 56 79 6E 00 1F 60 B4 86 D9 +04 4E 61 B4 96 96 C1 2A 93 D1 1A AD 89 D6 5B 18 AD A5 63 B0 CA 55 62 B4 0E 03 17 A2 87 50 45 EB +24 46 6B E9 18 AC B2 95 16 AD 4B 54 67 5A 46 4B 21 7C 4F F7 C9 9D 07 7E 4D 70 9C 9F A7 FC FA 26 +5A 00 EF 02 B7 27 D8 30 8F 26 5A 67 80 87 83 B7 34 D1 02 78 1F D8 15 B8 45 52 CB 2A F0 1A D5 99 +56 AA C7 BC 5F 9C 63 CF FD 54 F7 B4 52 3E 76 FE 89 19 B7 AC 50 3D 8F F0 6A C2 2D 3E AA 5E 9A D3 +2A F0 3A E9 A2 35 4F B0 20 7D B4 66 0D 16 A4 8F 96 C1 92 12 58 05 DE 20 4D B4 E6 0D 16 C0 03 A4 +8B D6 3C C1 82 B4 D1 32 58 52 22 A9 A2 95 22 58 90 2E 5A F3 06 0B D2 45 CB 60 49 09 A5 88 56 AA +60 41 9A 68 A5 08 16 A4 89 96 C1 92 12 9B 37 5A 29 83 05 55 B4 2E CC B8 25 65 B0 60 FE 68 19 2C +A9 07 F3 44 2B 75 B0 60 BE 68 A5 0C 16 0C A2 75 6D 86 2D 06 4B EA C9 AC D1 EA 23 58 30 7B B4 52 +07 0B 66 8F 96 C1 92 7A 34 4B B4 FA 0A 16 CC 16 AD 3E 82 05 55 B4 5E 62 BA 68 19 2C A9 67 6B 4C +17 AD 3E 83 05 D3 47 AB AF 60 C1 F4 D1 32 58 52 06 D3 44 AB EF 60 C1 74 D1 EA 33 58 50 45 EB 65 +26 8B 96 C1 92 32 99 34 5A 39 82 05 93 47 AB EF 60 C1 E4 D1 32 58 52 46 6B 54 4F 9C E9 8A 56 AE +60 C1 64 D1 CA 11 2C 98 2C 5A 06 4B CA 6C 5C B4 72 06 0B AA 68 7D 3F 62 4B CE 60 C1 F8 68 19 2C +29 40 57 B4 72 07 0B 60 1F A3 A3 95 33 58 D0 1D 2D 83 25 05 19 15 AD 88 60 C1 E8 68 E5 0E 16 8C +8E 96 C1 92 02 0D 8B 56 54 B0 A0 8A D6 0F C4 07 0B 86 47 CB 60 49 C1 D6 A8 9E 38 73 9D F8 60 C1 +F6 68 45 05 0B AA 68 1D 61 10 2D 83 25 15 A0 1D AD E8 60 C1 CD D1 8A 0C 16 DC 1C 2D 83 25 15 A2 +89 56 09 0F 93 80 41 B4 A2 83 05 83 68 FD 14 3D 44 D2 C0 1A B0 1E 3D A2 65 1F F0 60 F4 88 DA 0A +65 C4 53 92 24 49 92 24 49 92 24 49 92 24 49 92 24 49 92 24 49 92 24 49 92 24 49 92 24 49 52 41 +FE 07 39 BD 85 89 55 AA C4 B1 00 00 00 00 49 45 4E 44 AE 42 60 82 +EndData +$EndBitmap $EndSCHEMATC diff --git a/reform2-motherboard/reform2-motherboard/reform2-pcie.sch b/reform2-motherboard/reform2-motherboard/reform2-pcie.sch @@ -6,8 +6,8 @@ $Descr A4 11693 8268 encoding utf-8 Sheet 6 9 Title "MNT Reform 2 PCIe" -Date "2019-07-03" -Rev "0.1" +Date "2019-07-09" +Rev "0.1.1" Comp "MNT Research GmbH" Comment1 "https://mntre.com" Comment2 "Engineer: Lukas F. Hartmann" @@ -1025,7 +1025,6 @@ NoConn ~ 2850 3100 NoConn ~ 2850 3200 NoConn ~ 2850 4500 NoConn ~ 2850 4600 -NoConn ~ 2850 5200 NoConn ~ 2850 5300 NoConn ~ 2850 5400 NoConn ~ 2850 5500 @@ -1034,7 +1033,6 @@ NoConn ~ 4150 5100 NoConn ~ 4150 5000 NoConn ~ 4150 4900 NoConn ~ 4150 4800 -NoConn ~ 9000 4850 Text GLabel 4600 4500 2 50 Input ~ 0 PCIE_WDISn Wire Wire Line @@ -1120,4 +1118,12 @@ Wire Wire Line Connection ~ 4500 4100 Wire Wire Line 4500 4100 4500 5300 +Text GLabel 2400 5200 0 50 Output ~ 0 +PCIE1_CLKREQn +Wire Wire Line + 2850 5200 2400 5200 +Text GLabel 9850 4850 2 50 Output ~ 0 +PCIE2_CLKREQn +Wire Wire Line + 9850 4850 9000 4850 $EndSCHEMATC diff --git a/reform2-motherboard/reform2-motherboard/reform2-power.sch b/reform2-motherboard/reform2-motherboard/reform2-power.sch @@ -6,8 +6,8 @@ $Descr A3 16535 11693 encoding utf-8 Sheet 2 9 Title "MNT Reform 2 Power System" -Date "2019-07-03" -Rev "0.1" +Date "2019-07-09" +Rev "0.1.1" Comp "MNT Research GmbH" Comment1 "https://mntre.com" Comment2 "Engineer: Lukas F. Hartmann" @@ -4528,4 +4528,62 @@ Text Notes 11500 2750 0 50 ~ 0 Up to 5A @ 3.3V Text Notes 11500 1700 0 50 ~ 0 Up to 3A @ 5V +$Bitmap +Pos 15350 10250 +Scale 1.000000 +Data +89 50 4E 47 0D 0A 1A 0A 00 00 00 0D 49 48 44 52 00 00 01 2C 00 00 00 70 08 06 00 00 00 A4 46 4D +4D 00 00 00 04 73 42 49 54 08 08 08 08 7C 08 64 88 00 00 06 2D 49 44 41 54 78 9C ED DD BB 8B 1D +65 1C 87 F1 67 77 45 B1 08 82 26 F1 D2 6A 5A FF 00 0B B5 16 4C 36 12 5D 2F 9D 69 BC 04 0D 5E 62 +A3 A4 B1 D0 CE 4B C4 24 42 2A 05 03 21 85 FA 07 68 B4 8A 60 67 21 12 6D 04 0D 1A 90 04 4C 97 B5 +98 19 CE 64 F7 9C 39 B7 77 DE DF 7B F6 3C 1F 38 EC 16 CB EC 97 2D 1E 66 66 77 CF 80 24 49 92 24 +49 92 24 49 92 24 49 92 24 49 92 24 49 92 24 49 92 24 49 92 24 49 92 24 49 52 42 8F 00 7B A2 47 +B4 1C 8A 1E D0 F2 10 70 5F F4 08 49 03 C7 81 B3 94 13 AD 3F 80 67 A2 47 D4 8E 02 DF 60 B4 A4 62 +1C 07 36 29 27 5A D7 81 7F 28 23 5A 47 A9 7E 36 5F 63 B4 A4 22 34 C1 2A 25 5A D7 EB 2D 25 44 AB +09 96 D1 92 0A D1 0E 56 09 D1 6A 82 55 42 B4 DA C1 32 5A 52 01 B6 06 AB 89 D6 EE A0 3D ED 60 45 +47 6B 6B B0 8C 96 14 6C 58 B0 22 A3 B5 35 58 91 D1 1A 16 2C A3 25 05 1A 15 AC A8 68 0D 0B 56 54 +B4 46 05 AB 89 D6 BD 99 F7 48 4B AF 2B 58 11 D1 1A 15 AC 88 68 75 05 6B 13 F8 0A A3 25 65 35 2E +58 B9 A3 D5 15 AC 4D E0 6F F2 45 6B 5C B0 8C 96 94 D9 24 C1 DA 04 BE 24 4F B4 C6 05 2B 67 B4 26 +09 96 D1 92 32 9A 34 58 B9 A2 35 49 B0 9A 68 3D DD F3 96 49 83 65 B4 34 97 5B A2 07 EC 50 1B F5 +C7 23 54 F7 93 22 ED 06 3E 66 70 C9 1A ED 71 AA 2D 2F 00 7F F6 F4 3D 1E 05 6E ED E9 D8 7D B8 54 +BF 34 86 C1 EA 4F 69 D1 3A 51 7F 5E 42 B4 F6 D7 1F FB 8A D6 67 C4 FF 27 C2 34 DE AB 5F 1A C3 60 +F5 CB 68 8D D6 67 B4 76 01 77 24 3E 66 9F 6E 8B 1E B0 28 56 A3 07 2C 81 0D AA 50 44 FD 45 7C 5B +13 AD 8D 71 5F 98 C9 7E E0 24 DE D3 D2 84 0C 56 1E 1B 54 F7 91 EE 8A 1E C2 E0 9E 96 D1 D2 C2 31 +58 F9 94 14 AD 3D 18 2D 2D 20 83 95 CF 0A D5 9F 17 18 AD E1 8C 96 C6 32 58 79 95 1A AD A7 A2 87 +D4 8C 96 3A 19 AC FC 4A 8C D6 09 8C 96 16 80 C1 8A 61 B4 BA ED 07 3E 05 EE 89 1E A2 B2 18 AC 38 +46 AB DB 01 E0 14 46 4B 2D 06 2B 96 D1 EA D6 5C 1E 1A 2D 01 06 AB 04 4D B4 3E C2 68 0D 73 80 EA +F2 F0 EE E8 21 8A 67 B0 CA B0 42 F5 36 30 46 6B B8 75 AA 33 2D A3 B5 E4 0C 56 39 8C 56 37 A3 25 +83 55 98 52 A3 F5 64 F4 90 9A D1 5A 72 06 AB 3C A5 46 EB 50 F4 90 DA 3A DE D3 5A 5A 06 AB 4C A5 +45 6B 2F F0 09 E5 44 EB 20 46 6B 29 F9 7E 58 E5 6A A2 05 F0 0A 70 25 70 0B 0C A2 05 70 2E 72 48 +ED 60 FD F1 45 E0 72 0F C7 FF 17 F8 BC 87 E3 0E 73 31 D3 F7 D1 12 99 E6 3D DD 53 BE 6E 00 5F 00 +77 6E D9 33 E9 7B BA A7 7E 5D 66 FB 99 D6 34 EF E9 9E FA 75 9E ED 67 5A 7F 25 38 EE 2F A8 38 5E +12 96 AF 7D 79 B8 35 5A 11 BC 3C 54 18 83 B5 18 56 80 67 81 0F 31 5A C3 18 AD 25 E1 3D AC C5 B1 +02 3C 57 7F FE 6A E4 90 5A FB 9E 56 09 DA F7 B4 B4 43 19 AC C5 D2 8E 56 09 67 C7 4D B4 7E 8C 1E +52 6B A2 E5 43 1D 76 28 83 B5 78 DA D1 2A C1 5E E0 B1 E8 11 2D 07 A9 6E 9A 6B 07 32 58 8B 69 25 +7A C0 16 EE 51 16 25 5C 56 48 D2 44 0C 96 A4 85 61 B0 24 2D 0C 83 25 69 61 18 AC FC 4A FA 0D 56 +49 5B A0 BC 3D 2A 8C C1 CA EF 2C F0 5F F4 88 DA EF C0 B7 D1 23 5A CE 01 57 A3 47 A8 5C 06 2B BF +33 C0 DB 94 11 AD 2B C0 61 CA 89 D6 59 E0 4D 8C 96 46 30 58 F9 DD A0 FA 9F C0 52 A2 F5 1B E5 44 +6B 13 38 8D D1 D2 08 06 2B 86 D1 EA 66 B4 34 94 C1 8A 63 B4 BA 19 2D 6D 63 B0 62 19 AD 6E 46 4B +37 31 58 F1 8C 56 B7 D3 C0 31 8C 96 30 58 A5 30 5A DD 8C 96 00 83 55 92 52 A3 F5 5D F4 10 06 BF +3D 3C 06 5C 0B DE A2 40 06 AB 2C 4D B4 DE A1 9C 68 3D 8F D1 52 21 0C 56 79 6E 00 1F 60 B4 86 D9 +04 4E 61 B4 96 96 C1 2A 93 D1 1A AD 89 D6 5B 18 AD A5 63 B0 CA 55 62 B4 0E 03 17 A2 87 50 45 EB +24 46 6B E9 18 AC B2 95 16 AD 4B 54 67 5A 46 4B 21 7C 4F F7 C9 9D 07 7E 4D 70 9C 9F A7 FC FA 26 +5A 00 EF 02 B7 27 D8 30 8F 26 5A 67 80 87 83 B7 34 D1 02 78 1F D8 15 B8 45 52 CB 2A F0 1A D5 99 +56 AA C7 BC 5F 9C 63 CF FD 54 F7 B4 52 3E 76 FE 89 19 B7 AC 50 3D 8F F0 6A C2 2D 3E AA 5E 9A D3 +2A F0 3A E9 A2 35 4F B0 20 7D B4 66 0D 16 A4 8F 96 C1 92 12 58 05 DE 20 4D B4 E6 0D 16 C0 03 A4 +8B D6 3C C1 82 B4 D1 32 58 52 22 A9 A2 95 22 58 90 2E 5A F3 06 0B D2 45 CB 60 49 09 A5 88 56 AA +60 41 9A 68 A5 08 16 A4 89 96 C1 92 12 9B 37 5A 29 83 05 55 B4 2E CC B8 25 65 B0 60 FE 68 19 2C +A9 07 F3 44 2B 75 B0 60 BE 68 A5 0C 16 0C A2 75 6D 86 2D 06 4B EA C9 AC D1 EA 23 58 30 7B B4 52 +07 0B 66 8F 96 C1 92 7A 34 4B B4 FA 0A 16 CC 16 AD 3E 82 05 55 B4 5E 62 BA 68 19 2C A9 67 6B 4C +17 AD 3E 83 05 D3 47 AB AF 60 C1 F4 D1 32 58 52 06 D3 44 AB EF 60 C1 74 D1 EA 33 58 50 45 EB 65 +26 8B 96 C1 92 32 99 34 5A 39 82 05 93 47 AB EF 60 C1 E4 D1 32 58 52 46 6B 54 4F 9C E9 8A 56 AE +60 C1 64 D1 CA 11 2C 98 2C 5A 06 4B CA 6C 5C B4 72 06 0B AA 68 7D 3F 62 4B CE 60 C1 F8 68 19 2C +29 40 57 B4 72 07 0B 60 1F A3 A3 95 33 58 D0 1D 2D 83 25 05 19 15 AD 88 60 C1 E8 68 E5 0E 16 8C +8E 96 C1 92 02 0D 8B 56 54 B0 A0 8A D6 0F C4 07 0B 86 47 CB 60 49 C1 D6 A8 9E 38 73 9D F8 60 C1 +F6 68 45 05 0B AA 68 1D 61 10 2D 83 25 15 A0 1D AD E8 60 C1 CD D1 8A 0C 16 DC 1C 2D 83 25 15 A2 +89 56 09 0F 93 80 41 B4 A2 83 05 83 68 FD 14 3D 44 D2 C0 1A B0 1E 3D A2 65 1F F0 60 F4 88 DA 0A +65 C4 53 92 24 49 92 24 49 92 24 49 92 24 49 92 24 49 92 24 49 92 24 49 92 24 49 92 24 49 52 41 +FE 07 39 BD 85 89 55 AA C4 B1 00 00 00 00 49 45 4E 44 AE 42 60 82 +EndData +$EndBitmap $EndSCHEMATC diff --git a/reform2-motherboard/reform2-motherboard/reform2-sd.sch b/reform2-motherboard/reform2-motherboard/reform2-sd.sch @@ -6,8 +6,8 @@ $Descr A4 11693 8268 encoding utf-8 Sheet 7 9 Title "MNT Reform 2 SD Card" -Date "2019-07-03" -Rev "0.1" +Date "2019-07-09" +Rev "0.1.1" Comp "MNT Research GmbH" Comment1 "https://mntre.com" Comment2 "Engineer: Lukas F. Hartmann" diff --git a/reform2-motherboard/reform2-motherboard/reform2-usb.sch b/reform2-motherboard/reform2-motherboard/reform2-usb.sch @@ -6,8 +6,8 @@ $Descr A3 16535 11693 encoding utf-8 Sheet 3 9 Title "MNT Reform 2 USB" -Date "2019-07-03" -Rev "0.1" +Date "2019-07-09" +Rev "0.1.1" Comp "MNT Research GmbH" Comment1 "https://mntre.com" Comment2 "Engineer: Lukas F. Hartmann" @@ -720,8 +720,6 @@ F 3 "" H 9500 4800 50 0001 C CNN $EndComp Wire Wire Line 9500 4800 9500 4750 -Text Notes 3750 10300 0 50 ~ 0 -TODO: wire up port power switches $Comp L Device:R_Small R60 U 1 1 5DB86F24 @@ -2388,4 +2386,23 @@ Wire Wire Line Connection ~ 13050 1950 Wire Wire Line 11300 1750 11300 2300 +Text GLabel 9000 1100 0 50 Input ~ 0 +USB_PWR +$Comp +L power:+5V #PWR0126 +U 1 1 5DBF4AD4 +P 9200 1000 +F 0 "#PWR0126" H 9200 850 50 0001 C CNN +F 1 "+5V" H 9215 1173 50 0000 C CNN +F 2 "" H 9200 1000 50 0001 C CNN +F 3 "" H 9200 1000 50 0001 C CNN + 1 9200 1000 + 1 0 0 -1 +$EndComp +Wire Wire Line + 9200 1000 9200 1100 +Wire Wire Line + 9200 1100 9000 1100 +Text Notes 1350 8150 0 50 ~ 0 +TODO: get rid of these?! $EndSCHEMATC diff --git a/reform2-motherboard/reform2-motherboard/reform2.lib b/reform2-motherboard/reform2-motherboard/reform2.lib @@ -253,124 +253,123 @@ F3 "" -350 2700 50 H I C CNN DRAW S -850 4850 700 -5450 0 1 0 f X GND 1 -950 4750 100 R 50 50 1 1 W -X VSYS 10 800 4350 100 L 50 50 1 1 O +X VSYS 10 800 4350 100 L 50 50 1 1 W X QSPI_A_SS1_B 100 800 -150 100 L 50 50 1 1 O -X CSI_P1_DP2 101 -950 -150 100 R 50 50 1 1 O +X CSI_P1_DP2 101 -950 -250 100 R 50 50 1 1 O X QSPI_A_DQS 102 800 -250 100 L 50 50 1 1 O -X CSI_P1_DN2 103 -950 -250 100 R 50 50 1 1 O +X CSI_P1_DN2 103 -950 -350 100 R 50 50 1 1 O X QSPI_A_SCLK 104 800 -350 100 L 50 50 1 1 O -X GND 105 -950 -350 100 R 50 50 1 1 O +X GND 105 -950 -450 100 R 50 50 1 1 W X SAI1_RX_SYNC 106 800 -450 100 L 50 50 1 1 O -X CSI_P1_CKP 107 -950 -450 100 R 50 50 1 1 O +X CSI_P1_CKP 107 -950 -550 100 R 50 50 1 1 O X SAI1_MCLK 108 800 -550 100 L 50 50 1 1 O -X CSI_P1_CKN 109 -950 -550 100 R 50 50 1 1 O -X ECSPI1_MOSI 11 -950 4250 100 R 50 50 1 1 W +X CSI_P1_CKN 109 -950 -650 100 R 50 50 1 1 O +X ECSPI1_MOSI 11 -950 4250 100 R 50 50 1 1 O X SAI1_TX_SYNC 110 800 -650 100 L 50 50 1 1 O -X UART3_TX 111 -950 -650 100 R 50 50 1 1 O +X UART3_TX 111 -950 -750 100 R 50 50 1 1 O X SAI1_TX_BCLK 112 800 -750 100 L 50 50 1 1 O -X CSI_P1_DN3 113 -950 -750 100 R 50 50 1 1 O -X VSYS 114 800 -850 100 L 50 50 1 1 O -X CSI_P1_DP3 115 -950 -850 100 R 50 50 1 1 O +X CSI_P1_DN3 113 -950 -850 100 R 50 50 1 1 O +X VSYS 114 800 -850 100 L 50 50 1 1 W +X CSI_P1_DP3 115 -950 -950 100 R 50 50 1 1 O X SAI1_TX_DATA[0] 116 800 -950 100 L 50 50 1 1 O -X UART3_RX 117 -950 -950 100 R 50 50 1 1 O +X UART3_RX 117 -950 -1050 100 R 50 50 1 1 O X SAI1_TX_DATA[1] 118 800 -1050 100 L 50 50 1 1 O -X PCIE1_REF_CLKP 119 -950 -1050 100 R 50 50 1 1 O +X PCIE1_REF_CLKP 119 -950 -1150 100 R 50 50 1 1 O X ETH1_MDI1N 12 800 4250 100 L 50 50 1 1 O X SAI1_TX_DATA[2] 120 800 -1150 100 L 50 50 1 1 O -X PCIE1_REF_CLKN 121 -950 -1150 100 R 50 50 1 1 O +X PCIE1_REF_CLKN 121 -950 -1250 100 R 50 50 1 1 O X SAI1_TX_DATA[3] 122 800 -1250 100 L 50 50 1 1 O -X GND 123 -950 -1250 100 R 50 50 1 1 O +X GND 123 -950 -1350 100 R 50 50 1 1 W X GPIO3_IO[16] 124 800 -1350 100 L 50 50 1 1 O -X PCIE1_TXN_P 125 -950 -1350 100 R 50 50 1 1 O +X PCIE1_TXN_P 125 -950 -1450 100 R 50 50 1 1 O X SAI1_TX_DATA[3] 126 800 -1450 100 L 50 50 1 1 O -X PCIE1_TXN_N 127 -950 -1450 100 R 50 50 1 1 O +X PCIE1_TXN_N 127 -950 -1550 100 R 50 50 1 1 O X SAI1_TX_DATA[4] 128 800 -1550 100 L 50 50 1 1 O -X ENET1_MDC 129 -950 -1550 100 R 50 50 1 1 O -X ECSPI1_SCLK 13 -950 4150 100 R 50 50 1 1 W +X ENET1_MDC 129 -950 -1650 100 R 50 50 1 1 O +X ECSPI1_SCLK 13 -950 4150 100 R 50 50 1 1 O X SAI1_TX_DATA[7] 130 800 -1650 100 L 50 50 1 1 O -X PCIE1_RXN_P 131 -950 -1650 100 R 50 50 1 1 O -X VSYS 132 800 -1750 100 L 50 50 1 1 O -X PCIE1_RXN_N 133 -950 -1750 100 R 50 50 1 1 O +X PCIE1_RXN_P 131 -950 -1750 100 R 50 50 1 1 O +X VSYS 132 800 -1750 100 L 50 50 1 1 W +X PCIE1_RXN_N 133 -950 -1850 100 R 50 50 1 1 O X SAI1_RX_DATA[0] 134 800 -1850 100 L 50 50 1 1 O -X ENET1_MDIO 135 -950 -1850 100 R 50 50 1 1 O +X ENET1_MDIO 135 -950 -1950 100 R 50 50 1 1 O X SAI1_RX_DATA[1] 136 800 -1950 100 L 50 50 1 1 O -X SAI1_RX_DATA[4] 137 -950 -1950 100 R 50 50 1 1 O +X SAI1_RX_DATA[4] 137 -950 -2050 100 R 50 50 1 1 O X SAI1_RX_DATA[2] 138 800 -2050 100 L 50 50 1 1 O -X SAI1_RX_DATA[5] 139 -950 -2050 100 R 50 50 1 1 O -X SAI1_TX_DATA[5] 139 -950 -2250 100 R 50 50 1 1 O +X SAI1_RX_DATA[5] 139 -950 -2150 100 R 50 50 1 1 O X ETH1_MDI1P 14 800 4150 100 L 50 50 1 1 O X SAI1_RX_DATA[3] 140 800 -2150 100 L 50 50 1 1 O -X GND 141 -950 -2350 100 R 50 50 1 1 O -X GND 141 -950 -2150 100 R 50 50 1 1 O +X GND 141 -950 -2250 100 R 50 50 1 1 W X SAI1_TX_BCLK 142 800 -2250 100 L 50 50 1 1 O -X SAI1_TX_DATA[5] 143 -950 -2450 100 R 50 50 1 1 O +X SAI1_TX_DATA[5] 143 -950 -2350 100 R 50 50 1 1 O X SAI1_TX_DATA[0] 144 800 -2350 100 L 50 50 1 1 O -X SAI1_RX_DATA[6] 145 -950 -2550 100 R 50 50 1 1 O +X SAI1_RX_DATA[6] 145 -950 -2450 100 R 50 50 1 1 O X SAI1_TX_DATA[1] 146 800 -2450 100 L 50 50 1 1 O -X QSPI_B_SCLK 147 -950 -2650 100 R 50 50 1 1 O +X QSPI_B_SCLK 147 -950 -2550 100 R 50 50 1 1 O X SAI1_TX_DATA[2] 148 800 -2550 100 L 50 50 1 1 O -X QSPI_B_DATA[3] 149 -950 -2750 100 R 50 50 1 1 O -X ECSPI1_MISO 15 -950 4050 100 R 50 50 1 1 W -X VSYS 150 800 -2650 100 L 50 50 1 1 O -X QSPI_B_DATA[2] 151 -950 -2850 100 R 50 50 1 1 O +X QSPI_B_DATA[3] 149 -950 -2650 100 R 50 50 1 1 O +X ECSPI1_MISO 15 -950 4050 100 R 50 50 1 1 O +X VSYS 150 800 -2650 100 L 50 50 1 1 W +X QSPI_B_DATA[2] 151 -950 -2750 100 R 50 50 1 1 O X SAI1_RX_DATA[7] 152 800 -2750 100 L 50 50 1 1 O -X QSPI_B_DATA[1] 153 -950 -2950 100 R 50 50 1 1 O +X QSPI_B_DATA[1] 153 -950 -2850 100 R 50 50 1 1 O X USDHC2_RESET_B 154 800 -2850 100 L 50 50 1 1 O -X QSPI_B_DATA[0] 155 -950 -3050 100 R 50 50 1 1 O +X QSPI_B_DATA[0] 155 -950 -2950 100 R 50 50 1 1 O X USB2_VBUS_DET 156 800 -2950 100 L 50 50 1 1 O -X QSPI_B_DQS 157 -950 -3150 100 R 50 50 1 1 O +X QSPI_B_DQS 157 -950 -3050 100 R 50 50 1 1 O X USB2_RX_P 158 800 -3050 100 L 50 50 1 1 O -X GND 159 -950 -3250 100 R 50 50 1 1 O +X GND 159 -950 -3150 100 R 50 50 1 1 W X ETH1_LED1_SPD 16 800 4050 100 L 50 50 1 1 O X USB2_RX_N 160 800 -3150 100 L 50 50 1 1 O -X LVDS1_TX3_P 161 -950 -3350 100 R 50 50 1 1 O +X LVDS1_TX3_P 161 -950 -3250 100 R 50 50 1 1 O X SAI1_TX_DATA[6] 162 800 -3250 100 L 50 50 1 1 O -X LVDS1_TX3_N 163 -950 -3450 100 R 50 50 1 1 O +X LVDS1_TX3_N 163 -950 -3350 100 R 50 50 1 1 O X USB2_TX_P 164 800 -3350 100 L 50 50 1 1 O -X ONOFF 165 -950 -3550 100 R 50 50 1 1 O +X ONOFF 165 -950 -3450 100 R 50 50 1 1 O X USB2_TX_N 166 800 -3450 100 L 50 50 1 1 O -X PCIE2_RXN_N 167 -950 -3650 100 R 50 50 1 1 O -X VSYS 168 800 -3550 100 L 50 50 1 1 O -X PCIE2_RXN_P 169 -950 -3750 100 R 50 50 1 1 O -X ECSPI1_SS0 17 -950 3950 100 R 50 50 1 1 W +X PCIE2_RXN_N 167 -950 -3550 100 R 50 50 1 1 O +X VSYS 168 800 -3550 100 L 50 50 1 1 W +X PCIE2_RXN_P 169 -950 -3650 100 R 50 50 1 1 O +X ECSPI1_SS0 17 -950 3950 100 R 50 50 1 1 O X USB2_DN 170 800 -3650 100 L 50 50 1 1 O -X COLD_RESET_IN 171 -950 -3850 100 R 50 50 1 1 O +X COLD_RESET_IN 171 -950 -3750 100 R 50 50 1 1 O X USB2_DP 172 800 -3750 100 L 50 50 1 1 O -X PCIE2_TXN_N 173 -950 -3950 100 R 50 50 1 1 O +X PCIE2_TXN_N 173 -950 -3850 100 R 50 50 1 1 O X USB1_ID 174 800 -3850 100 L 50 50 1 1 O -X PCIE2_TXN_P 175 -950 -4050 100 R 50 50 1 1 O +X PCIE2_TXN_P 175 -950 -3950 100 R 50 50 1 1 O X USB1_DP 176 800 -3950 100 L 50 50 1 1 O -X GND 177 -950 -4150 100 R 50 50 1 1 O +X GND 177 -950 -4050 100 R 50 50 1 1 W X USB1_DN 178 800 -4050 100 L 50 50 1 1 O -X PCIE2_REF_CLKN 179 -950 -4250 100 R 50 50 1 1 O +X PCIE2_REF_CLKN 179 -950 -4150 100 R 50 50 1 1 O X ETH1_MDI2N 18 800 3950 100 L 50 50 1 1 O X USB1_VBUS_DET 180 800 -4150 100 L 50 50 1 1 O -X PCIE2_REF_CLKP 181 -950 -4350 100 R 50 50 1 1 O +X PCIE2_REF_CLKP 181 -950 -4250 100 R 50 50 1 1 O X USB1_RX_P 182 800 -4250 100 L 50 50 1 1 O -X VCC_RTC 183 -950 -4450 100 R 50 50 1 1 O +X VCC_RTC 183 -950 -4350 100 R 50 50 1 1 O X USB1_RX_N 184 800 -4350 100 L 50 50 1 1 O -X ALT_BOOT 185 -950 -4550 100 R 50 50 1 1 O +X ALT_BOOT 185 -950 -4450 100 R 50 50 1 1 O X VSYS 186 800 -4450 100 L 50 50 1 1 O -X NC 187 -950 -4650 100 R 50 50 1 1 O +X NC 187 -950 -4550 100 R 50 50 1 1 N X USB1_TX_P 188 800 -4550 100 L 50 50 1 1 O -X EEPROM_WP 189 -950 -4750 100 R 50 50 1 1 O +X EEPROM_WP 189 -950 -4650 100 R 50 50 1 1 O X GND 19 -950 3850 100 R 50 50 1 1 W X USB1_TX_N 190 800 -4650 100 L 50 50 1 1 O -X MICBIAS 191 -950 -4850 100 R 50 50 1 1 O +X SAI2_MCLK 191 -950 -4750 100 R 50 50 1 1 O X SAI1_RX_BCLK 192 800 -4750 100 L 50 50 1 1 O -X MICIN 193 -950 -4950 100 R 50 50 1 1 O +X MICIN 193 -950 -4850 100 R 50 50 1 1 O X SAI1_TX_DATA[4] 194 800 -4850 100 L 50 50 1 1 O -X AUD_GND 195 -950 -5050 100 R 50 50 1 1 O +X AUD_GND 195 -950 -4950 100 R 50 50 1 1 P X PWM3_OUT 196 800 -4950 100 L 50 50 1 1 O -X SAI2_TX_BCLK 197 -950 -5150 100 R 50 50 1 1 O +X SAI2_TX_BCLK 197 -950 -5050 100 R 50 50 1 1 O X PWM2_OUT 198 800 -5050 100 L 50 50 1 1 O -X AVDD33_ETH 2 800 4750 100 L 50 50 1 1 O +X SAI2_TX_SYNC 199 -950 -5150 100 R 50 50 1 1 I +X AVDD33_ETH 2 800 4750 100 L 50 50 1 1 w X ETH1_MDI2P 20 800 3850 100 L 50 50 1 1 O X PWM1_OUT 200 800 -5150 100 L 50 50 1 1 O -X SAI2_TX_SYNC 201 -950 -5250 100 R 50 50 1 1 O +X SAI2_TX_DATA[0] 201 -950 -5250 100 R 50 50 1 1 O X PMIC_ON_REQ 202 800 -5250 100 L 50 50 1 1 O X SAI2_RX_DATA[0] 203 -950 -5350 100 R 50 50 1 1 O -X VSYS 204 800 -5350 100 L 50 50 1 1 O +X VSYS 204 800 -5350 100 L 50 50 1 1 W X LVDS1_TX0_P 21 -950 3750 100 R 50 50 1 1 O X ETH1_LED3 22 800 3750 100 L 50 50 1 1 O X LVDS1_TX0_N 23 -950 3650 100 R 50 50 1 1 O @@ -378,9 +377,9 @@ X ETH1_MDI3N 24 800 3650 100 L 50 50 1 1 O X HDMI_DDC_SCL 25 -950 3550 100 R 50 50 1 1 O X ETH1_MDI3P 26 800 3550 100 L 50 50 1 1 O X HDMI_AUXN 27 -950 3450 100 R 50 50 1 1 O -X VSYS 28 800 3450 100 L 50 50 1 1 O +X VSYS 28 800 3450 100 L 50 50 1 1 W X HDMI_AUXP 29 -950 3350 100 R 50 50 1 1 O -X PCIE2_CLKREQ_B 3 -950 4650 100 R 50 50 1 1 W +X PCIE2_CLKREQ_B 3 -950 4650 100 R 50 50 1 1 O X HDMI_CLKP 30 800 3350 100 L 50 50 1 1 O X HDMI_DDC_SDA 31 -950 3250 100 R 50 50 1 1 O X HDMI_CLKN 32 800 3250 100 L 50 50 1 1 O @@ -388,7 +387,7 @@ X DSI_DP2 33 -950 3150 100 R 50 50 1 1 O X HDMI_CEC 34 800 3150 100 L 50 50 1 1 O X DSI_DN2 35 -950 3050 100 R 50 50 1 1 O X HDMI_TXP0 36 800 3050 100 L 50 50 1 1 O -X GND 37 -950 2950 100 R 50 50 1 1 O +X GND 37 -950 2950 100 R 50 50 1 1 W X HDMI_TXN0 38 800 2950 100 L 50 50 1 1 O X DSI_DP0 39 -950 2850 100 R 50 50 1 1 O X ETH1_LED_ACT 4 800 4650 100 L 50 50 1 1 O @@ -398,17 +397,17 @@ X HDMI_TXP1 42 800 2750 100 L 50 50 1 1 O X I2C3_SCL 43 -950 2650 100 R 50 50 1 1 O X HDMI_TXN1 44 800 2650 100 L 50 50 1 1 O X DSI_DP1 45 -950 2550 100 R 50 50 1 1 O -X VSYS 46 800 2550 100 L 50 50 1 1 O +X VSYS 46 800 2550 100 L 50 50 1 1 W X DSI_DN1 47 -950 2450 100 R 50 50 1 1 O X HDMI_TXP2 48 800 2450 100 L 50 50 1 1 O X I2C3_SDA 49 -950 2350 100 R 50 50 1 1 O -X PCIE1_CLKREQ_B 5 -950 4550 100 R 50 50 1 1 W +X PCIE1_CLKREQ_B 5 -950 4550 100 R 50 50 1 1 O X HDMI_TXN2 50 800 2350 100 L 50 50 1 1 O X DSI_DP3 51 -950 2250 100 R 50 50 1 1 O X ENET1_MDC 52 800 2250 100 L 50 50 1 1 O X DSI_DN3 53 -950 2150 100 R 50 50 1 1 O X JTAG_MOD 54 800 2150 100 L 50 50 1 1 O -X GND 55 -950 2050 100 R 50 50 1 1 O +X GND 55 -950 2050 100 R 50 50 1 1 W X JTAG_NTRST 56 800 2050 100 L 50 50 1 1 O X DSI_CKN 57 -950 1950 100 R 50 50 1 1 O X UART2_TX 58 800 1950 100 L 50 50 1 1 O @@ -417,45 +416,46 @@ X ETH1_MDI0N 6 800 4550 100 L 50 50 1 1 O X GPIO3_IO[17] 60 800 1850 100 L 50 50 1 1 O X USDHC2_CD_B 61 -950 1750 100 R 50 50 1 1 O X GPIO1_IO[19] 62 800 1750 100 L 50 50 1 1 O -X VSYS 64 800 1650 100 L 50 50 1 1 O -X ECSPI3_MISO 65 -950 1650 100 R 50 50 1 1 O +X UART2_RX 63 -950 1650 100 R 50 50 1 1 O +X VSYS 64 800 1650 100 L 50 50 1 1 W +X ECSPI3_MISO 65 -950 1550 100 R 50 50 1 1 O X JTAG_TCK 66 800 1550 100 L 50 50 1 1 O -X USDHC2_WP 67 -950 1550 100 R 50 50 1 1 O +X USDHC2_WP 67 -950 1450 100 R 50 50 1 1 O X JTAG_TMS 68 800 1450 100 L 50 50 1 1 O -X ECSPI3_SCLK 69 -950 1450 100 R 50 50 1 1 O -X QSPI_BSS0_B 7 -950 4450 100 R 50 50 1 1 W +X ECSPI3_SCLK 69 -950 1350 100 R 50 50 1 1 O +X QSPI_BSS0_B 7 -950 4450 100 R 50 50 1 1 O X JTAG_TDI 70 800 1350 100 L 50 50 1 1 O -X GND 71 -950 1350 100 R 50 50 1 1 O +X GND 71 -950 1250 100 R 50 50 1 1 W X JTAG_TDO 72 800 1250 100 L 50 50 1 1 O -X PCIE1_CLKREQ_B 73 -950 1250 100 R 50 50 1 1 O +X I2C4_SCL 73 -950 1150 100 R 50 50 1 1 O X QSPI_A_DATA[0] 74 800 1150 100 L 50 50 1 1 O -X PCIE2_CLKREQ_B 75 -950 1150 100 R 50 50 1 1 O +X I2C4_SDA 75 -950 1050 100 R 50 50 1 1 O X QSPI_A_DATA[1] 76 800 1050 100 L 50 50 1 1 O -X LVDS1_CLK_P 77 -950 1050 100 R 50 50 1 1 O -X VSYS 78 800 950 100 L 50 50 1 1 O -X LVDS1_CLK_N 79 -950 950 100 R 50 50 1 1 O +X LVDS1_CLK_P 77 -950 950 100 R 50 50 1 1 O +X VSYS 78 800 950 100 L 50 50 1 1 W +X LVDS1_CLK_N 79 -950 850 100 R 50 50 1 1 O X ETH1_MDI0P 8 800 4450 100 L 50 50 1 1 O X USDHC2_CLK 80 800 850 100 L 50 50 1 1 O -X GPIO3_IO[18] 81 -950 850 100 R 50 50 1 1 O +X GPIO3_IO[18] 81 -950 750 100 R 50 50 1 1 O X USDHC2_CMD 82 800 750 100 L 50 50 1 1 O -X CSI_P1_DP0 83 -950 750 100 R 50 50 1 1 O +X CSI_P1_DP0 83 -950 650 100 R 50 50 1 1 O X USDHC2_DATA0 84 800 650 100 L 50 50 1 1 O -X CSI_P1_DN0 85 -950 650 100 R 50 50 1 1 O +X CSI_P1_DN0 85 -950 550 100 R 50 50 1 1 O X USDHC2_DATA1 86 800 550 100 L 50 50 1 1 O -X GND 87 -950 550 100 R 50 50 1 1 O +X GND 87 -950 450 100 R 50 50 1 1 W X USDHC2_DATA2 88 800 450 100 L 50 50 1 1 O -X CSI_P1_DP1 89 -950 450 100 R 50 50 1 1 O -X QSPI_B_SS1_B 9 -950 4350 100 R 50 50 1 1 W +X CSI_P1_DP1 89 -950 350 100 R 50 50 1 1 O +X QSPI_B_SS1_B 9 -950 4350 100 R 50 50 1 1 O X USDHC2_DATA3 90 800 350 100 L 50 50 1 1 O -X CSI_P1_DN1 91 -950 350 100 R 50 50 1 1 O +X CSI_P1_DN1 91 -950 250 100 R 50 50 1 1 O X QSPI_A_DATA[2] 92 800 250 100 L 50 50 1 1 O -X LVDS1_TX1_P 93 -950 250 100 R 50 50 1 1 O +X LVDS1_TX1_P 93 -950 150 100 R 50 50 1 1 O X QSPI_A_DATA[3] 94 800 150 100 L 50 50 1 1 O -X LVDS1_TX1_N 95 -950 150 100 R 50 50 1 1 O -X VSYS 96 800 50 100 L 50 50 1 1 O -X LVDS1_TX2_P 97 -950 50 100 R 50 50 1 1 O +X LVDS1_TX1_N 95 -950 50 100 R 50 50 1 1 O +X VSYS 96 800 50 100 L 50 50 1 1 W +X LVDS1_TX2_P 97 -950 -50 100 R 50 50 1 1 O X QSPI_A_SS0_B 98 800 -50 100 L 50 50 1 1 O -X LVDS1_TX2_N 99 -950 -50 100 R 50 50 1 1 O +X LVDS1_TX2_N 99 -950 -150 100 R 50 50 1 1 O ENDDRAW ENDDEF #