commit 8c80379eb2b81732e9291e5c4960ee95b3ee763b
parent 3a7b103a93d81a48e22f982e5ebe450d99924116
Author: mntmn <lukas@mntmn.com>
Date: Thu, 6 Jun 2019 14:55:40 +0200
WIP reform v2 pin reader tool
Diffstat:
3 files changed, 848 insertions(+), 0 deletions(-)
diff --git a/reform2-motherboard/reform2-motherboard/pintest/imx8m-a.csv b/reform2-motherboard/reform2-motherboard/pintest/imx8m-a.csv
@@ -0,0 +1,408 @@
+"A1","X_ETH0_LED2_ACT","OC","-","ETH0 activity LED output"
+"A2","X_ETH0_LED0_LINK","OC","-","ETH0 link LED output"
+"A3","X_ETH0_A+","I/O","VDD_3V3","ETH0 data A+"
+"A4","X_ETH0_A","I/O","VDD_3V3","ETH0 data A-"
+"A5","X_ETH0_B+","I/O","VDD_3V3","ETH0 data B+"
+"A6","X_ETH0_B","I/O","VDD_3V3","ETH0 data B-"
+"A7","X_ETH0_C+","I/O","VDD_3V3","ETH0 data C+"
+"A8","X_ETH0_C","I/O","VDD_3V3","ETH0 data C-"
+"A9","X_ETH0_D+","I/O","VDD_3V3","ETH0 data D+"
+"A10","X_ETH0_D","I/O","VDD_3V3","ETH0 data D-"
+"A11","NVCC_SD2","PWR_O","NVCC_SD2","SD2 Reference Voltage"
+"A12","X_SD2_RESET_B","O","NVCC_SD2","SD2 Reset Out"
+"A13","X_SD2_WP","I ","NVCC_SD2","SD2 Write Protect"
+"A14","X_SD2_CD_B","I","NVCC_SD2","SD2 Card Detect"
+"A15","X_SD2_DATA1_EXT","I/O","NVCC_SD2","SD2 Data 1"
+"A16","X_SD2_DATA0_EXT","I/O","NVCC_SD2","SD2 Data 0"
+"A17","X_SD2_CLK_EXT","O","NVCC_SD2","SD2 Clock"
+"A18","X_SD2_CMD_EXT","O","NVCC_SD2","SD2 Command"
+"A19","X_SD2_DATA3_EXT","I/O","NVCC_SD2","SD2 Data 3"
+"A20","X_SD2_DATA2_EXT","I/O","NVCC_SD2","SD2 Data 2"
+"A21","X_USB1_DP","I/O","USB_P0_VDD33","USB1 Data+"
+"A22","X_USB1_DN","I/O","USB_P0_VDD33","USB1 Data-"
+"A23","X_USB1_TX_P","O","USB_P0_VPH","USB1_TX+"
+"A24","X_USB1_TX_N","O","USB_P0_VPH","USB1_TX-"
+"A25","X_USB1_RX_P","I","USB_P0_VPH","USB1_RX+"
+"A26","X_USB1_RX_N","I","USB_P0_VPH","USB1_RX-"
+"A27","X_USB2_DP","I/O","USB_P1_VDD33","USB2 Data+"
+"A28","X_USB2_DN","I/O","USB_P1_VDD33","USB2 Data-"
+"A29","X_USB2_TX_P","O","USB_P1_VPH","USB2_TX+"
+"A30","X_USB2_TX_N","O","USB_P1_VPH","USB2_TX-"
+"A31","X_USB2_RX_P","I","USB_P1_VPH","USB2_RX+"
+"A32","X_USB2_RX_N","I","USB_P1_VPH","USB2_RX-"
+"A33","X_HDMI_AUX_N","O","HDMI_AVDDIO","HDMI_AUX-"
+"A34","X_HDMI_AUX_P","O","HDMI_AVDDIO","HDMI_AUX+"
+"A35","X_HDMI_TX_M_LN_3","O","HDMI_AVDDIO","HDMI_TX3-"
+"A36","X_HDMI_TX_P_LN_3","O","HDMI_AVDDIO","HDMI_TX3+"
+"A37","X_HDMI_TX_M_LN_0","O","HDMI_AVDDIO","HDMI_TX0-"
+"A38","X_HDMI_TX_P_LN_0","O","HDMI_AVDDIO","HDMI_TX0+"
+"A39","X_HDMI_TX_M_LN_1","O","HDMI_AVDDIO","HDMI_TX1-"
+"A40","X_HDMI_TX_P_LN_1","O","HDMI_AVDDIO","HDMI_TX1+"
+"A41","X_HDMI_TX_M_LN_2","O","HDMI_AVDDIO","HDMI_TX2-"
+"A42","X_HDMI_TX_P_LN_2","O","HDMI_AVDDIO","HDMI_TX2+"
+"A43","X_WLAN_EN","I","NVCC_SD2","WLAN Enable"
+"A44","X_BT_EN","I","NVCC_SD2","Bluetooth Enable"
+"A45","X_WIFI_HCI_UART_WAKEHOST_L","I","NVCC_SD2","WIFI Wakehost"
+"A46","X_WIFI_WLAN_RF_KILL_L","I","NVCC_SD2","WIFI WLAN RF Kill"
+"A47","X_WIFI_SELECT","I","NVCC_SD2","WIFI Select"
+"A48","X_WIFI_CLK_REQ","I","NVCC_SD2","WIFI Clk Request"
+"A49","X_WIFI_CLK_REQ","I","NVCC_SD2","WIFI Clk Request"
+"A50","NC","NC","NC","not connected"
+"A51","NC","NC","NC","not connected"
+"A52","NC","NC","NC","not connected"
+"A53","VDD_3V3","PWR_I","VDD_3V3","3,3V Primary Voltage Supply Input"
+"A54","VDD_3V3","PWR_I","VDD_3V3","3,3V Primary Voltage Supply Input"
+"A55","X_PMIC_nSDWN","OD","VDD_3V3","PMIC Shutdown Output"
+"A56","X_PMIC_STBY_REQ","I","VDD_3V3","PMCI Standby Input"
+"A57","X_nPMIC_INT","OD","VDD_3V3","PMIC Open Drain interrupt Output"
+"A58","X_ONOFF","I","VDD_3V3","i.MX8M ONOFF Input"
+"A59","X_BOOT_MODE0","I","NVCC_JTAG","i.MX8M Boot Mode Input"
+"A60","X_BOOT_MODE1","I","NVCC_JTAG","i.MX8M Boot Mode Input"
+"A61","X_POR_B","I/O","NVCC_SNVS","Power On Reset"
+"A62","X_nRESET_IN","I","VDD_IN_3V3","i.MX8 Reset Input"
+"A63","X_PMIC_ON_REQ","I","NVCC_SNVS","PMIC Enable"
+"A64","X_PGOOD_OD","OD","-","Power Good Output"
+"A65","VDD_IN_3V3","PWR_I","VDD_IN_3V3","3,3 V Primary Voltage Supply Input"
+"A66","VDD_IN_3V3","PWR_I","VDD_IN_3V3","3,3 V Primary Voltage Supply Input"
+"A67","VDD_IN_3V3","PWR_I","VDD_IN_3V3","3,3 V Primary Voltage Supply Input"
+"A68","VDD_IN_3V3","PWR_I","VDD_IN_3V3","3,3 V Primary Voltage Supply Input"
+"A69","X_MIPI_CSI2_D0_P","I","CSI_P2_VDDHA","MIPI/CSI2 Data0+"
+"A70","X_MIPI_CSI2_D0_N","I","CSI_P2_VDDHA","MIPI/CSI2 Data0-"
+"A71","X_MIPI_CSI2_D1_P","I","CSI_P2_VDDHA","MIPI/CSI2 Data1+"
+"A72","X_MIPI_CSI2_D1_N","I","CSI_P2_VDDHA","MIPI/CSI2 Data1-"
+"A73","X_MIPI_CSI2_CLK_P","I","CSI_P2_VDDHA","MIPI/CSI2 CLK+"
+"A74","X_MIPI_CSI2_CLK_N","I","CSI_P2_VDDHA","MIPI/CSI2 CLK-"
+"A75","X_MIPI_CSI2_D2_P","I","CSI_P2_VDDHA","MIPI/CSI2 Data2+"
+"A76","X_MIPI_CSI2_D2_N","I","CSI_P2_VDDHA","MIPI/CSI2 Data2-"
+"A77","X_MIPI_CSI2_D3_P","I","CSI_P2_VDDHA","MIPI/CSI2 Data3+"
+"A78","X_MIPI_CSI2_D3_N","I","CSI_P2_VDDHA","MIPI/CSI2 Data3-"
+"A79","X_JTAG_TCK","I","NVCC_JTAG","JTAG Clock input"
+"A80","X_JTAG_TMS","I","NVCC_JTAG","JTAG TMS"
+"A81","X_JTAG_TDI","I","NVCC_JTAG","JTAG TDI"
+"A82","X_JTAG_TDO","O","NVCC_JTAG","JTAG TDO"
+"A83","X_JTAG_TRST_B","I","NVCC_JTAG","JTAG Reset input"
+"A84","X_JTAG_MOD","I","NVCC_JTAG","JTAG MOD"
+"A85","X_ETH_JTAG_TMS","I","VDD_3V3","ETH0 JTAG TMS"
+"A86","X_ETH_JTAG_TDO","O","VDD_3V3","ETH0 JTAG TDO"
+"A87","X_ETH_JTAG_TDI","I","VDD_3V3","ETH0 JTAG TDI"
+"A88","X_ETH_JTAG_CLK","I","VDD_3V3","ETH0 JTAG CLK"
+"A89","X_I2C3_SCL","O","NVCC_I2C","I2C3 Clock"
+"A90","X_I2C3_SDA","I/O","NVCC_I2C","I2C3 Data"
+"A91","VDD_1V8","PWR_O","VDD_1V8","VDD_1V8 Reference Voltage"
+"A92","VDD_1V8","PWR_O","VDD_1V8","VDD_1V8 Reference Voltage"
+"A93","X_I2C4_SCL","O","NVCC_I2C","I2C3 Clock"
+"A94","X_I2C4_SDA","I/O","NVCC_I2C","I2C3 Data"
+"A95","X_I2C2_SCL","O","NVCC_I2C","I2C2 Clock"
+"A96","X_I2C2_SDA","I/O","NVCC_I2C","I2C2 Data"
+"A97","X_MIPI_CSI1_D0_P","I","CSI_P1_VDDHA","MIPI/CSI1 Data0+"
+"A98","X_MIPI_CSI1_D0_N","I","CSI_P1_VDDHA","MIPI/CSI1 Data0-"
+"A99","X_MIPI_CSI1_D1_P","I","CSI_P1_VDDHA","MIPI/CSI1 Data1+"
+"A100","X_MIPI_CSI1_D1_N","I","CSI_P1_VDDHA","MIPI/CSI1 Data1-"
+"A101","X_MIPI_CSI1_CLK_P","O","CSI_P1_VDDHA","MIPI/CSI1 CLK+"
+"A102","X_MIPI_CSI1_CLK_N","O","CSI_P1_VDDHA","MIPI/CSI1 CLK-"
+"A103","X_MIPI_CSI1_D2_P","I","CSI_P1_VDDHA","MIPI/CSI1 Data2+"
+"A104","X_MIPI_CSI1_D2_N","I","CSI_P1_VDDHA","MIPI/CSI1 Data2-"
+"A105","X_MIPI_CSI1_D3_P","I","CSI_P1_VDDHA","MIPI/CSI1 Data3+"
+"A106","X_MIPI_CSI1_D3_N","I","CSI_P1_VDDHA","MIPI/CSI1 Data3-"
+"A107","X_PCIE1_TXN_N","O","PCIE0_VPH","PCIe1 Transmit Lane-"
+"A108","X_PCIE1_TXN_P","O","PCIE0_VPH","PCIe1 Transmit Lane+"
+"A109","X_PCIE1_RXN_N","I","PCIE0_VPH","PCIe1 Receive Lane-"
+"A110","X_PCIE1_RXN_P","I","PCIE0_VPH","PCIe1 Receive Lane+"
+"A111","X_PCIE1_REF_PAD_CLK_N","I","PCIE0_VPH","PCIe1 Clock Input Lane-"
+"A112","X_PCIE1_REF_PAD_CLK_P","I","PCIE0_VPH","PCIe1 Clock Input Lane+"
+"A113","X_PCIE2_REF_PAD_CLK_N","I","PCIE1_VPH","PCIe2 Clock Input Lane-"
+"A114","X_PCIE2_REF_PAD_CLK_P","I","PCIE1_VPH","PCIe2 Clock Input Lane+"
+"A115","X_PCIE2_TXN_P","O","PCIE1_VPH","PCIe2 Transmit Lane+"
+"A116","X_PCIE2_TXN_N","O","PCIE1_VPH","PCIe2 Transmit Lane-"
+"A117","X_PCIE2_RXN_N","I","PCIE1_VPH","PCIe2 Receive Lane-"
+"A118","X_PCIE2_RXN_P","I","PCIE1_VPH","PCIe2 Receive Lane+"
+"A119","X_CLK2_P","O","VDDA","CLK2 Output Lane+"
+"A120","X_CLK2_N","O","VDDA","CLK2 Output Lane-"
+"A121","X_CLK1_P","O","VDDA","CLK1 Output Lane+"
+"A122","X_CLK1_N","O","VDDA","CLK1 Output Lane-"
+"A123","X_MIPI_DSI_D2_P","O","DSI_VDDHA","MIPI DSI Data2+"
+"A124","X_MIPI_DSI_D2_N","O","DSI_VDDHA","MIPI DSI Data2-"
+"A125","X_MIPI_DSI_D1_P","O","DSI_VDDHA","MIPI DSI Data1+"
+"A126","X_MIPI_DSI_D1_N","O","DSI_VDDHA","MIPI DSI Data1-"
+"A127","X_MIPI_DSI_CLK_P","O","DSI_VDDHA","MIPI DSI Clock+"
+"A128","X_MIPI_DSI_CLK_N","O","DSI_VDDHA","MIPI DSI Clock-"
+"A129","X_MIPI_DSI_D0_P","O","DSI_VDDHA","MIPI DSI Data0+"
+"A130","X_MIPI_DSI_D0_N","O","DSI_VDDHA","MIPI DSI Data0-"
+"A131","X_MIPI_DSI_D3_P","O","DSI_VDDHA","MIPI DSI Data3+"
+"A132","X_MIPI_DSI_D3_N","O","DSI_VDDHA","MIPI DSI Data3-"
+"B1","GND","-","GND","Ground 0 V"
+"B2","GND","-","GND","Ground 0 V"
+"B3","GND","-","GND","Ground 0 V"
+"B4","GND","-","GND","Ground 0 V"
+"B5","GND","-","GND","Ground 0 V"
+"B6","GND","-","GND","Ground 0 V"
+"B7","GND","-","GND","Ground 0 V"
+"B8","GND","-","GND","Ground 0 V"
+"B9","GND","-","GND","Ground 0 V"
+"B10","GND","-","GND","Ground 0 V"
+"B11","GND","-","GND","Ground 0 V"
+"B12","GND","-","GND","Ground 0 V"
+"B13","GND","-","GND","Ground 0 V"
+"B14","GND","-","GND","Ground 0 V"
+"B15","GND","-","GND","Ground 0 V"
+"B16","GND","-","GND","Ground 0 V"
+"B17","GND","-","GND","Ground 0 V"
+"B18","GND","-","GND","Ground 0 V"
+"B19","GND","-","GND","Ground 0 V"
+"B20","GND","-","GND","Ground 0 V"
+"B21","GND","-","GND","Ground 0 V"
+"B22","GND","-","GND","Ground 0 V"
+"B23","GND","-","GND","Ground 0 V"
+"B24","GND","-","GND","Ground 0 V"
+"B25","GND","-","GND","Ground 0 V"
+"B26","GND","-","GND","Ground 0 V"
+"B27","GND","-","GND","Ground 0 V"
+"B28","GND","-","GND","Ground 0 V"
+"B29","GND","-","GND","Ground 0 V"
+"B30","GND","-","GND","Ground 0 V"
+"B31","GND","-","GND","Ground 0 V"
+"B32","GND","-","GND","Ground 0 V"
+"B33","GND","-","GND","Ground 0 V"
+"B34","GND","-","GND","Ground 0 V"
+"B35","GND","-","GND","Ground 0 V"
+"B36","GND","-","GND","Ground 0 V"
+"B37","GND","-","GND","Ground 0 V"
+"B38","GND","-","GND","Ground 0 V"
+"B39","GND","-","GND","Ground 0 V"
+"B40","GND","-","GND","Ground 0 V"
+"B41","GND","-","GND","Ground 0 V"
+"B42","GND","-","GND","Ground 0 V"
+"B43","GND","-","GND","Ground 0 V"
+"B44","GND","-","GND","Ground 0 V"
+"B45","GND","-","GND","Ground 0 V"
+"B46","GND","-","GND","Ground 0 V"
+"B47","GND","-","GND","Ground 0 V"
+"B48","GND","-","GND","Ground 0 V"
+"B49","GND","-","GND","Ground 0 V"
+"B50","GND","-","GND","Ground 0 V"
+"B51","GND","-","GND","Ground 0 V"
+"B52","GND","-","GND","Ground 0 V"
+"B53","GND","-","GND","Ground 0 V"
+"B54","GND","-","GND","Ground 0 V"
+"B55","GND","-","GND","Ground 0 V"
+"B56","GND","-","GND","Ground 0 V"
+"B57","GND","-","GND","Ground 0 V"
+"B58","GND","-","GND","Ground 0 V"
+"B59","GND","-","GND","Ground 0 V"
+"B60","GND","-","GND","Ground 0 V"
+"B61","GND","-","GND","Ground 0 V"
+"B62","GND","-","GND","Ground 0 V"
+"B63","GND","-","GND","Ground 0 V"
+"B64","GND","-","GND","Ground 0 V"
+"B65","GND","-","GND","Ground 0 V"
+"B66","GND","-","GND","Ground 0 V"
+"C1","X_SAI5_RXD0","I","NVCC_SAI5","SAI5 Receive Lane0"
+"C2","X_SAI5_RXD1","I","NVCC_SAI5","SAI5 Receive Lane1"
+"C3","X_SAI5_RXD2","I","NVCC_SAI5","SAI5 Receive Lane2"
+"C4","X_SAI5_RXD3","I","NVCC_SAI5","SAI5 Receive Lane3"
+"C5","X_SAI5_RXC","I","NVCC_SAI5","SAI5 Receive Clock"
+"C6","X_SAI5_MCLK","O","NVCC_SAI5","SAI5 Master Clock"
+"C7","X_SAI5_RXFS","I","NVCC_SAI5","SAI5 Receive Frame Sync"
+"C8","X_SAI3_RXC","I","NVCC_SAI3","SAI3 Receive Clock"
+"C9","X_SAI3_RXFS","I","NVCC_SAI3","SAI3 Receive Frame Sync"
+"C10","X_SAI3_RXD","I","NVCC_SAI3","SAI3 Receive Lane"
+"C11","X_SAI3_TXD","O","NVCC_SAI3","SAI3 Transmit Lane"
+"C12","X_SAI3_TXFS","O","NVCC_SAI3","SAI3 Transmit Frame Sync"
+"C13","X_SAI3_TXC","O","NVCC_SAI3","SAI3 Transmit Clock"
+"C14","X_SAI3_MCLK","O","NVCC_SAI3","SAI3 Master Clock"
+"C15","X_USB1_ID","I","USB_P0_VDD33","USB1 OTG ID Pin"
+"C16","X_USB1_VBUS","I","USB_P0_VDD33","USB1 OTG VBUS Input"
+"C17","X_GPIO1_IO12","I/O","NVCC_GPI01","GPIO12"
+"C18","X_GPIO1_IO13","I/O","NVCC_GPI01","GPIO13"
+"C19","NC","-","-","-"
+"C20","X_SAI2_RXC","I","NVCC_SAI2","SAI2 Receive Clock"
+"C21","X_SAI2_RXFS","I","NVCC_SAI2","SAI2 Receive Frame Sync"
+"C22","X_SAI2_RXD0","I","NVCC_SAI2","SAI2 Receive Lane0"
+"C23","X_SAI2_TXD0","O","NVCC_SAI2","SAI2 Transmit Lane0"
+"C24","X_SAI2_TXFS","O","NVCC_SAI2","SAI2 Transmit Frame Sync"
+"C25","X_SAI2_TXC","O","NVCC_SAI2","SAI2 Transmit Clock"
+"C26","X_SAI2_MCLK","O","NVCC_SAI2","SAI2 Master Clock"
+"C27","X_USB2_ID","I","USB_P1_VDD33","USB2 OTG ID Pin"
+"C28","X_USB2_VBUS","I","USB_P1_VDD33","USB2 OTG VBUS Input"
+"C29","X_GPIO1_IO14","I/O","NVCC_GPI01","GPIO14"
+"C30","X_GPIO1_IO15","I/O","NVCC_GPI01","GPIO15"
+"C31","X_HDMI_DDC_SDA","I/O","HDMI_AVDDIO","HDMI Data"
+"C32","X_HDMI_DDC_SCL","O","HDMI_AVDDIO","HDMI Clock"
+"C33","X_HDMI_CEC","I/O","HDMI_AVDDIO","HDMI CEC"
+"C34","X_HDMI_HPD","I","HDMI_AVDDIO","HDMI HPD"
+"C35","X_UART3_TXD","O","NVCC_UART","UART3 Transmit Lane"
+"C36","X_UART3_RXD","I","NVCC_UART","UART3 Receive Lane"
+"C37","NC","-","-","-"
+"C38","NC","-","-","-"
+"C39","X_UART1_RXD","I","NVCC_UART","UART1 Receive Lane"
+"C40","X_UART1_TXD","O","NVCC_UART","UART1 Transmit Lane"
+"C41","X_GPIO1_IO08","I/O","NVCC_GPI01","GPIO08"
+"C42","X_GPIO1_IO09","I/O","NVCC_GPI01","GPIO09"
+"C43","X_GPIO1_IO10","I/O","NVCC_GPI01","GPIO10"
+"C44","X_GPIO1_IO11","I/O","NVCC_GPI01","GPIO11"
+"C45","X_I2C1_SCL","O","NVCC_I2C","I2C1 Clock"
+"C46","X_I2C1_SDA","I/O","NVCC_I2C","I2C1 Data"
+"C47","NC","-","-","-"
+"C48","NC","-","-","-"
+"C49","X_SAI1_MCLK","O","NVCC_SAI1","SAI1 Master Clock"
+"C50","X_SAI1_TXD7/BOOT_CFG[15]","O","NVCC_SAI1","SAI1 Transmit Lane 7"
+"C51","X_SAI1_TXD6/BOOT_CFG[14]","O","NVCC_SAI1","SAI1 Transmit Lane 6"
+"C52","X_SAI1_TXD5/BOOT_CFG[13]","O","NVCC_SAI1","SAI1 Transmit Lane 5"
+"C53","X_SAI1_TXD4/BOOT_CFG[12]","O","NVCC_SAI1","SAI1 Transmit Lane 4"
+"C54","X_SAI1_TXD3/BOOT_CFG[11]","O","NVCC_SAI1","SAI1 Transmit Lane 3"
+"C55","X_SAI1_TXD2/BOOT_CFG[10]","O","NVCC_SAI1","SAI1 Transmit Lane 2"
+"C56","X_SAI1_TXD1/BOOT_CFG[9]","O","NVCC_SAI1","SAI1 Transmit Lane 1"
+"C57","X_SAI1_TXD0/BOOT_CFG[8]","O","NVCC_SAI1","SAI1 Transmit Lane 0"
+"C58","X_SAI1_TXC","O","NVCC_SAI1","SAI1 Transmit Clock"
+"C59","X_SAI1_TXFS","O","NVCC_SAI1","SAI Transmit Frame Sync"
+"C60","X_SAI1_RXD7/BOOT_CFG[7]","I","NVCC_SAI1","SAI Receive Lane 7"
+"C61","X_SAI1_RXD6/BOOT_CFG[6]","I","NVCC_SAI1","SAI Receive Lane 6"
+"C62","X_SAI1_RXD5/BOOT_CFG[5]","I","NVCC_SAI1","SAI Receive Lane 5"
+"C63","X_SAI1_RXD4/BOOT_CFG[4]","I","NVCC_SAI1","SAI Receive Lane 4"
+"C64","X_SAI1_RXD3/BOOT_CFG[3]","I","NVCC_SAI1","SAI Receive Lane 3"
+"C65","X_SAI1_RXD2/BOOT_CFG[2]","I","NVCC_SAI1","SAI Receive Lane 2"
+"C66","X_SAI1_RXD1/BOOT_CFG[1]","I","NVCC_SAI1","SAI Receive Lane 1"
+"C67","X_SAI1_RXD0/BOOT_CFG[0]","I","NVCC_SAI1","SAI Receive Lane 0"
+"C68","X_SAI1_RXC","I","NVCC_SAI1","SAI Receive Clock"
+"C69","X_SAI1_RXFS","I","NVCC_SAI1","SAI Receive Frame Sync"
+"C70","NC","-","-","-"
+"C71","X_ECSPI1_MOSI","O","NVCC_ECSPI","ECSPI1 Master Out"
+"C72","X_ECSPI1_MISO","I","NVCC_ECSPI","ECSPI1 Master In"
+"C73","X_ECSPI1_SS0","O","NVCC_ECSPI","ECSPI1 Chip Select 0"
+"C74","X_ECSPI1_SCLK","O","NVCC_ECSPI","ECSPI1 Clock"
+"C75","X_ECSPI2_MOSI","O","NVCC_ECSPI","ECSPI2 Master Out"
+"C76","X_ECSPI2_MISO","I","NVCC_ECSPI","ECSPI2 Master In"
+"C77","X_ECSPI2_SS0","O","NVCC_ECSPI","ECSPI2 Chip Select"
+"C78","X_ECSPI2_SCLK","O","NVCC_ECSPI","ECSPI2 Clock"
+"C79","X_GPIO1_IO01","I/O","NVCC_GPI01","GPIO01"
+"C80","X_GPIO1_IO03/WIFI_SELECT","I/O","NVCC_GPI01","GPIO03"
+"C81","X_GPIO1_IO04/SD2_VSELECT","I/O","NVCC_GPI01","GPIO04"
+"C82","X_GPIO1_IO06","I/O","NVCC_GPI01","GPIO06"
+"C83","X_NAND_DATA00","I/O","NVCC_NAND","NAND Data Lane 0"
+"C84","X_NAND_DATA01","I/O","NVCC_NAND","NAND Data Lane 1"
+"C85","X_NAND_DATA02","I/O","NVCC_NAND","NAND Data Lane 2"
+"C86","X_NAND_DATA03","I/O","NVCC_NAND","NAND Data Lane 3"
+"C87","X_NAND_DATA04","I/O","NVCC_NAND","NAND Data Lane 4"
+"C88","X_NAND_DATA05","I/O","NVCC_NAND","NAND Data Lane 5"
+"C89","X_NAND_DATA06","I/O","NVCC_NAND","NAND Data Lane 6"
+"C90","X_NAND_DATA07","I/O","NVCC_NAND","NAND Data Lane 7"
+"C91","X_NAND_RE_B","I/O","NVCC_NAND","NAND Read Enable"
+"C92","X_NAND_READY_B","I/O","NVCC_NAND","NAND Ready (low active)"
+"C93","X_NAND_CE0_B","I/O","NVCC_NAND","NAND Chip Enable 0"
+"C94","X_NAND_CE1_B","I/O","NVCC_NAND","NAND Chip Enable 1"
+"C95","X_NAND_WE_B","I/O","NVCC_NAND","NAND Write enable (low active)"
+"C96","X_NAND_WP_B","I/O","NVCC_NAND","NAND Write Protect"
+"C97","X_NAND_CE3_B","I/O","NVCC_NAND","NAND Chip Enable 3"
+"C98","X_NAND_CLE","I/O","NVCC_NAND","NAND Command latch enable"
+"C99","X_NAND_DQS","I/O","NVCC_NAND","NAND Data Strobe"
+"C100","X_NAND_CE2_B","I/O","NVCC_NAND","NAND Chip Enable 2"
+"C101","X_NAND_ALE","I/O","NVCC_NAND","NAND Address latch enable"
+"C102","X_SPDIF_EXT_CLK","O","NVCC_SAI3","SPDIF External Clock"
+"C103","X_SPDIF_TX","O","NVCC_SAI3","SPDIF Transmit Lane"
+"C104","X_SPDIF_RX","I","NVCC_SAI3","SPDIF Receive Lane"
+"D1","GND","-","GND","Ground 0 V"
+"D2","GND","-","GND","Ground 0 V"
+"D3","GND","-","GND","Ground 0 V"
+"D4","GND","-","GND","Ground 0 V"
+"D5","GND","-","GND","Ground 0 V"
+"D6","GND","-","GND","Ground 0 V"
+"D7","GND","-","GND","Ground 0 V"
+"D8","GND","-","GND","Ground 0 V"
+"D9","GND","-","GND","Ground 0 V"
+"D10","GND","-","GND","Ground 0 V"
+"D11","GND","-","GND","Ground 0 V"
+"D12","GND","-","GND","Ground 0 V"
+"D13","GND","-","GND","Ground 0 V"
+"D14","GND","-","GND","Ground 0 V"
+"D15","GND","-","GND","Ground 0 V"
+"D16","GND","-","GND","Ground 0 V"
+"D17","GND","-","GND","Ground 0 V"
+"D18","GND","-","GND","Ground 0 V"
+"D19","GND","-","GND","Ground 0 V"
+"D20","GND","-","GND","Ground 0 V"
+"D21","GND","-","GND","Ground 0 V"
+"D22","GND","-","GND","Ground 0 V"
+"D23","GND","-","GND","Ground 0 V"
+"D24","GND","-","GND","Ground 0 V"
+"D25","GND","-","GND","Ground 0 V"
+"D26","GND","-","GND","Ground 0 V"
+"D27","GND","-","GND","Ground 0 V"
+"D28","GND","-","GND","Ground 0 V"
+"D29","GND","-","GND","Ground 0 V"
+"D30","GND","-","GND","Ground 0 V"
+"D31","GND","-","GND","Ground 0 V"
+"D32","GND","-","GND","Ground 0 V"
+"D33","GND","-","GND","Ground 0 V"
+"D34","GND","-","GND","Ground 0 V"
+"D35","GND","-","GND","Ground 0 V"
+"D36","GND","-","GND","Ground 0 V"
+"D37","GND","-","GND","Ground 0 V"
+"D38","GND","-","GND","Ground 0 V"
+"D39","GND","-","GND","Ground 0 V"
+"D40","GND","-","GND","Ground 0 V"
+"D41","GND","-","GND","Ground 0 V"
+"D42","GND","-","GND","Ground 0 V"
+"D43","GND","-","GND","Ground 0 V"
+"D44","GND","-","GND","Ground 0 V"
+"D45","GND","-","GND","Ground 0 V"
+"D46","GND","-","GND","Ground 0 V"
+"D47","GND","-","GND","Ground 0 V"
+"D48","GND","-","GND","Ground 0 V"
+"D49","GND","-","GND","Ground 0 V"
+"D50","GND","-","GND","Ground 0 V"
+"D51","GND","-","GND","Ground 0 V"
+"D52","GND","-","GND","Ground 0 V"
+"E1","X_UART4_RXD","I","NVCC_UART","UART4 Receive Lane"
+"E2","X_UART4_TXD","O","NVCC_UART","UART4 Transmit Lane"
+"E3","X_UART2_RXD","I","NVCC_UART","UART2 Receive Lane"
+"E4","X_UART2_TXD","O","NVCC_UART","UART2 Transmit Lane"
+"E5","NC","-","-","-"
+"E6","NC","-","-","-"
+"E7","VDDA_PHY_3V3","NC","-","-"
+"E8","VDDA_1V8","NC","-","-"
+"E9","VDD_VPU_0V9","NC","-","-"
+"E10","NC","NC","-","-"
+"E11","VDD_ARM_0V9","NC","-","-"
+"E12","VDD_SNVS_0V9","NC","-","-"
+"E13","NVCC_DRAM_1V1","NC","-","-"
+"E14","VDD_PHY_1V8","NC","-","-"
+"E15","VDD_PHY_0V9","NC","-","-"
+"E16","VDD_SOC_0V9","NC","-","-"
+"E17","VDD_DRAM_0V9","NC","-","-"
+"E18","VDD_GPU_0V9","NC","-","-"
+"E19","VBAT","PWR_IN","VBAT","Battery Supply"
+"E20","VBAT","PWR_IN","VBAT","Battery Supply"
+"E21","X_ENET0_RGMII_RXD2","I","VDD_3V3","ENET0 RGMII Receive Lane2"
+"E22","X_ENET0_RGMII_RXD3","I","VDD_3V3","ENET0 RGMII Receive Lane3"
+"E23","X_ENET0_RGMII_RXD0","I","VDD_3V3","ENET0 RGMII Receive Lane0"
+"E24","X_ENET0_RGMII_RXD1","I","VDD_3V3","ENET0 RGMII Receive Lane1"
+"E25","X_ENET0_RGMII_RX_CTL","I","VDD_3V3","ENET0 RGMII Receive Control"
+"E26","X_ENET0_RGMII_RXC","I","VDD_3V3","ENET0 RGMII Receive Clock"
+"E27","X_ENET0_RGMII_TXD2","O","VDD_3V3","ENET0 RGMII Transmit Lane2"
+"E28","X_ENET0_RGMII_TXD3","O","VDD_3V3","ENET0 RGMII Transmit Lane3"
+"E29","X_ENET0_RGMII_TXD0","O","VDD_3V3","ENET0 RGMII Transmit Lane0"
+"E30","X_ENET0_RGMII_TXD1","O","VDD_3V3","ENET0 RGMII Transmit Lane1"
+"E31","X_ENET0_RGMII_TX_CTL","O","VDD_3V3","ENET0 RGMII Transmit Control"
+"E32","X_ENET0_RGMII_TXC","O","VDD_3V3","ENET0 RGMII Transmit Clock"
+"E33","X_ENET0_MDC","O","VDD_3V3","ENET0 MDIO Clock"
+"E34","X_ENET0_MDIO","I/O","VDD_3V3","ENET0 MDIO Data"
+"E35","VDD_ETH_1V0","NC","-",
+"E36","VCC_ENET_2V5","NC","-",
+"F1","GND","-","GND",
+"F2","GND","-","GND",
+"F3","GND","-","GND",
+"F4","GND","-","GND",
+"F5","GND","-","GND",
+"F6","GND","-","GND",
+"F7","GND","-","GND",
+"F8","GND","-","GND",
+"F9","GND","-","GND",
+"F10","GND","-","GND",
+"F11","GND","-","GND",
+"F12","GND","-","GND",
+"F13","GND","-","GND",
+"F14","GND","-","GND",
+"F15","GND","-","GND",
+"F16","GND","-","GND",
+"F17","GND","-","GND",
+"F18","GND","-","GND",
diff --git a/reform2-motherboard/reform2-motherboard/pintest/pin.rb b/reform2-motherboard/reform2-motherboard/pintest/pin.rb
@@ -0,0 +1,32 @@
+require 'csv'
+
+type_map = {
+ "OC" => "C",
+ "I/O" => "B",
+ "O" => "O",
+ "I" => "I",
+ "PWR_O" => "w",
+ "PWR_I" => "W",
+ "PWR_IN" => "W",
+ "-" => "W",
+ "OD" => "E",
+ "NC" => "N"
+}
+
+y = 0
+x = 0
+
+pinrow = "A"
+
+CSV.foreach("imx8m-a.csv") do |row|
+ pin=row[0].gsub(" ","")
+ if pin[0]!=pinrow
+ pinrow=pin[0]
+ x += 2000
+ y = 0
+ end
+ signal=row[1].sub("X_","").gsub(" ","")
+ signal_type=type_map[row[2].gsub(" ","")]
+ puts "X #{signal} #{pin} #{x} #{y} 100 R 50 50 1 1 #{signal_type}"
+ y += 100
+end
diff --git a/reform2-motherboard/reform2-motherboard/pintest/pins.txt b/reform2-motherboard/reform2-motherboard/pintest/pins.txt
@@ -0,0 +1,408 @@
+X ETH0_LED2_ACT A1 0 0 100 R 50 50 1 1 C
+X ETH0_LED0_LINK A2 0 100 100 R 50 50 1 1 C
+X ETH0_A+ A3 0 200 100 R 50 50 1 1 B
+X ETH0_A A4 0 300 100 R 50 50 1 1 B
+X ETH0_B+ A5 0 400 100 R 50 50 1 1 B
+X ETH0_B A6 0 500 100 R 50 50 1 1 B
+X ETH0_C+ A7 0 600 100 R 50 50 1 1 B
+X ETH0_C A8 0 700 100 R 50 50 1 1 B
+X ETH0_D+ A9 0 800 100 R 50 50 1 1 B
+X ETH0_D A10 0 900 100 R 50 50 1 1 B
+X NVCC_SD2 A11 0 1000 100 R 50 50 1 1 w
+X SD2_RESET_B A12 0 1100 100 R 50 50 1 1 O
+X SD2_WP A13 0 1200 100 R 50 50 1 1 I
+X SD2_CD_B A14 0 1300 100 R 50 50 1 1 I
+X SD2_DATA1_EXT A15 0 1400 100 R 50 50 1 1 B
+X SD2_DATA0_EXT A16 0 1500 100 R 50 50 1 1 B
+X SD2_CLK_EXT A17 0 1600 100 R 50 50 1 1 O
+X SD2_CMD_EXT A18 0 1700 100 R 50 50 1 1 O
+X SD2_DATA3_EXT A19 0 1800 100 R 50 50 1 1 B
+X SD2_DATA2_EXT A20 0 1900 100 R 50 50 1 1 B
+X USB1_DP A21 0 2000 100 R 50 50 1 1 B
+X USB1_DN A22 0 2100 100 R 50 50 1 1 B
+X USB1_TX_P A23 0 2200 100 R 50 50 1 1 O
+X USB1_TX_N A24 0 2300 100 R 50 50 1 1 O
+X USB1_RX_P A25 0 2400 100 R 50 50 1 1 I
+X USB1_RX_N A26 0 2500 100 R 50 50 1 1 I
+X USB2_DP A27 0 2600 100 R 50 50 1 1 B
+X USB2_DN A28 0 2700 100 R 50 50 1 1 B
+X USB2_TX_P A29 0 2800 100 R 50 50 1 1 O
+X USB2_TX_N A30 0 2900 100 R 50 50 1 1 O
+X USB2_RX_P A31 0 3000 100 R 50 50 1 1 I
+X USB2_RX_N A32 0 3100 100 R 50 50 1 1 I
+X HDMI_AUX_N A33 0 3200 100 R 50 50 1 1 O
+X HDMI_AUX_P A34 0 3300 100 R 50 50 1 1 O
+X HDMI_TX_M_LN_3 A35 0 3400 100 R 50 50 1 1 O
+X HDMI_TX_P_LN_3 A36 0 3500 100 R 50 50 1 1 O
+X HDMI_TX_M_LN_0 A37 0 3600 100 R 50 50 1 1 O
+X HDMI_TX_P_LN_0 A38 0 3700 100 R 50 50 1 1 O
+X HDMI_TX_M_LN_1 A39 0 3800 100 R 50 50 1 1 O
+X HDMI_TX_P_LN_1 A40 0 3900 100 R 50 50 1 1 O
+X HDMI_TX_M_LN_2 A41 0 4000 100 R 50 50 1 1 O
+X HDMI_TX_P_LN_2 A42 0 4100 100 R 50 50 1 1 O
+X WLAN_EN A43 0 4200 100 R 50 50 1 1 I
+X BT_EN A44 0 4300 100 R 50 50 1 1 I
+X WIFI_HCI_UART_WAKEHOST_L A45 0 4400 100 R 50 50 1 1 I
+X WIFI_WLAN_RF_KILL_L A46 0 4500 100 R 50 50 1 1 I
+X WIFI_SELECT A47 0 4600 100 R 50 50 1 1 I
+X WIFI_CLK_REQ A48 0 4700 100 R 50 50 1 1 I
+X WIFI_CLK_REQ A49 0 4800 100 R 50 50 1 1 I
+X NC A50 0 4900 100 R 50 50 1 1 N
+X NC A51 0 5000 100 R 50 50 1 1 N
+X NC A52 0 5100 100 R 50 50 1 1 N
+X VDD_3V3 A53 0 5200 100 R 50 50 1 1 W
+X VDD_3V3 A54 0 5300 100 R 50 50 1 1 W
+X PMIC_nSDWN A55 0 5400 100 R 50 50 1 1 E
+X PMIC_STBY_REQ A56 0 5500 100 R 50 50 1 1 I
+X nPMIC_INT A57 0 5600 100 R 50 50 1 1 E
+X ONOFF A58 0 5700 100 R 50 50 1 1 I
+X BOOT_MODE0 A59 0 5800 100 R 50 50 1 1 I
+X BOOT_MODE1 A60 0 5900 100 R 50 50 1 1 I
+X POR_B A61 0 6000 100 R 50 50 1 1 B
+X nRESET_IN A62 0 6100 100 R 50 50 1 1 I
+X PMIC_ON_REQ A63 0 6200 100 R 50 50 1 1 I
+X PGOOD_OD A64 0 6300 100 R 50 50 1 1 E
+X VDD_IN_3V3 A65 0 6400 100 R 50 50 1 1 W
+X VDD_IN_3V3 A66 0 6500 100 R 50 50 1 1 W
+X VDD_IN_3V3 A67 0 6600 100 R 50 50 1 1 W
+X VDD_IN_3V3 A68 0 6700 100 R 50 50 1 1 W
+X MIPI_CSI2_D0_P A69 0 6800 100 R 50 50 1 1 I
+X MIPI_CSI2_D0_N A70 0 6900 100 R 50 50 1 1 I
+X MIPI_CSI2_D1_P A71 0 7000 100 R 50 50 1 1 I
+X MIPI_CSI2_D1_N A72 0 7100 100 R 50 50 1 1 I
+X MIPI_CSI2_CLK_P A73 0 7200 100 R 50 50 1 1 I
+X MIPI_CSI2_CLK_N A74 0 7300 100 R 50 50 1 1 I
+X MIPI_CSI2_D2_P A75 0 7400 100 R 50 50 1 1 I
+X MIPI_CSI2_D2_N A76 0 7500 100 R 50 50 1 1 I
+X MIPI_CSI2_D3_P A77 0 7600 100 R 50 50 1 1 I
+X MIPI_CSI2_D3_N A78 0 7700 100 R 50 50 1 1 I
+X JTAG_TCK A79 0 7800 100 R 50 50 1 1 I
+X JTAG_TMS A80 0 7900 100 R 50 50 1 1 I
+X JTAG_TDI A81 0 8000 100 R 50 50 1 1 I
+X JTAG_TDO A82 0 8100 100 R 50 50 1 1 O
+X JTAG_TRST_B A83 0 8200 100 R 50 50 1 1 I
+X JTAG_MOD A84 0 8300 100 R 50 50 1 1 I
+X ETH_JTAG_TMS A85 0 8400 100 R 50 50 1 1 I
+X ETH_JTAG_TDO A86 0 8500 100 R 50 50 1 1 O
+X ETH_JTAG_TDI A87 0 8600 100 R 50 50 1 1 I
+X ETH_JTAG_CLK A88 0 8700 100 R 50 50 1 1 I
+X I2C3_SCL A89 0 8800 100 R 50 50 1 1 O
+X I2C3_SDA A90 0 8900 100 R 50 50 1 1 B
+X VDD_1V8 A91 0 9000 100 R 50 50 1 1 w
+X VDD_1V8 A92 0 9100 100 R 50 50 1 1 w
+X I2C4_SCL A93 0 9200 100 R 50 50 1 1 O
+X I2C4_SDA A94 0 9300 100 R 50 50 1 1 B
+X I2C2_SCL A95 0 9400 100 R 50 50 1 1 O
+X I2C2_SDA A96 0 9500 100 R 50 50 1 1 B
+X MIPI_CSI1_D0_P A97 0 9600 100 R 50 50 1 1 I
+X MIPI_CSI1_D0_N A98 0 9700 100 R 50 50 1 1 I
+X MIPI_CSI1_D1_P A99 0 9800 100 R 50 50 1 1 I
+X MIPI_CSI1_D1_N A100 0 9900 100 R 50 50 1 1 I
+X MIPI_CSI1_CLK_P A101 0 10000 100 R 50 50 1 1 O
+X MIPI_CSI1_CLK_N A102 0 10100 100 R 50 50 1 1 O
+X MIPI_CSI1_D2_P A103 0 10200 100 R 50 50 1 1 I
+X MIPI_CSI1_D2_N A104 0 10300 100 R 50 50 1 1 I
+X MIPI_CSI1_D3_P A105 0 10400 100 R 50 50 1 1 I
+X MIPI_CSI1_D3_N A106 0 10500 100 R 50 50 1 1 I
+X PCIE1_TXN_N A107 0 10600 100 R 50 50 1 1 O
+X PCIE1_TXN_P A108 0 10700 100 R 50 50 1 1 O
+X PCIE1_RXN_N A109 0 10800 100 R 50 50 1 1 I
+X PCIE1_RXN_P A110 0 10900 100 R 50 50 1 1 I
+X PCIE1_REF_PAD_CLK_N A111 0 11000 100 R 50 50 1 1 I
+X PCIE1_REF_PAD_CLK_P A112 0 11100 100 R 50 50 1 1 I
+X PCIE2_REF_PAD_CLK_N A113 0 11200 100 R 50 50 1 1 I
+X PCIE2_REF_PAD_CLK_P A114 0 11300 100 R 50 50 1 1 I
+X PCIE2_TXN_P A115 0 11400 100 R 50 50 1 1 O
+X PCIE2_TXN_N A116 0 11500 100 R 50 50 1 1 O
+X PCIE2_RXN_N A117 0 11600 100 R 50 50 1 1 I
+X PCIE2_RXN_P A118 0 11700 100 R 50 50 1 1 I
+X CLK2_P A119 0 11800 100 R 50 50 1 1 O
+X CLK2_N A120 0 11900 100 R 50 50 1 1 O
+X CLK1_P A121 0 12000 100 R 50 50 1 1 O
+X CLK1_N A122 0 12100 100 R 50 50 1 1 O
+X MIPI_DSI_D2_P A123 0 12200 100 R 50 50 1 1 O
+X MIPI_DSI_D2_N A124 0 12300 100 R 50 50 1 1 O
+X MIPI_DSI_D1_P A125 0 12400 100 R 50 50 1 1 O
+X MIPI_DSI_D1_N A126 0 12500 100 R 50 50 1 1 O
+X MIPI_DSI_CLK_P A127 0 12600 100 R 50 50 1 1 O
+X MIPI_DSI_CLK_N A128 0 12700 100 R 50 50 1 1 O
+X MIPI_DSI_D0_P A129 0 12800 100 R 50 50 1 1 O
+X MIPI_DSI_D0_N A130 0 12900 100 R 50 50 1 1 O
+X MIPI_DSI_D3_P A131 0 13000 100 R 50 50 1 1 O
+X MIPI_DSI_D3_N A132 0 13100 100 R 50 50 1 1 O
+X GND B1 2000 0 100 R 50 50 1 1 W
+X GND B2 2000 100 100 R 50 50 1 1 W
+X GND B3 2000 200 100 R 50 50 1 1 W
+X GND B4 2000 300 100 R 50 50 1 1 W
+X GND B5 2000 400 100 R 50 50 1 1 W
+X GND B6 2000 500 100 R 50 50 1 1 W
+X GND B7 2000 600 100 R 50 50 1 1 W
+X GND B8 2000 700 100 R 50 50 1 1 W
+X GND B9 2000 800 100 R 50 50 1 1 W
+X GND B10 2000 900 100 R 50 50 1 1 W
+X GND B11 2000 1000 100 R 50 50 1 1 W
+X GND B12 2000 1100 100 R 50 50 1 1 W
+X GND B13 2000 1200 100 R 50 50 1 1 W
+X GND B14 2000 1300 100 R 50 50 1 1 W
+X GND B15 2000 1400 100 R 50 50 1 1 W
+X GND B16 2000 1500 100 R 50 50 1 1 W
+X GND B17 2000 1600 100 R 50 50 1 1 W
+X GND B18 2000 1700 100 R 50 50 1 1 W
+X GND B19 2000 1800 100 R 50 50 1 1 W
+X GND B20 2000 1900 100 R 50 50 1 1 W
+X GND B21 2000 2000 100 R 50 50 1 1 W
+X GND B22 2000 2100 100 R 50 50 1 1 W
+X GND B23 2000 2200 100 R 50 50 1 1 W
+X GND B24 2000 2300 100 R 50 50 1 1 W
+X GND B25 2000 2400 100 R 50 50 1 1 W
+X GND B26 2000 2500 100 R 50 50 1 1 W
+X GND B27 2000 2600 100 R 50 50 1 1 W
+X GND B28 2000 2700 100 R 50 50 1 1 W
+X GND B29 2000 2800 100 R 50 50 1 1 W
+X GND B30 2000 2900 100 R 50 50 1 1 W
+X GND B31 2000 3000 100 R 50 50 1 1 W
+X GND B32 2000 3100 100 R 50 50 1 1 W
+X GND B33 2000 3200 100 R 50 50 1 1 W
+X GND B34 2000 3300 100 R 50 50 1 1 W
+X GND B35 2000 3400 100 R 50 50 1 1 W
+X GND B36 2000 3500 100 R 50 50 1 1 W
+X GND B37 2000 3600 100 R 50 50 1 1 W
+X GND B38 2000 3700 100 R 50 50 1 1 W
+X GND B39 2000 3800 100 R 50 50 1 1 W
+X GND B40 2000 3900 100 R 50 50 1 1 W
+X GND B41 2000 4000 100 R 50 50 1 1 W
+X GND B42 2000 4100 100 R 50 50 1 1 W
+X GND B43 2000 4200 100 R 50 50 1 1 W
+X GND B44 2000 4300 100 R 50 50 1 1 W
+X GND B45 2000 4400 100 R 50 50 1 1 W
+X GND B46 2000 4500 100 R 50 50 1 1 W
+X GND B47 2000 4600 100 R 50 50 1 1 W
+X GND B48 2000 4700 100 R 50 50 1 1 W
+X GND B49 2000 4800 100 R 50 50 1 1 W
+X GND B50 2000 4900 100 R 50 50 1 1 W
+X GND B51 2000 5000 100 R 50 50 1 1 W
+X GND B52 2000 5100 100 R 50 50 1 1 W
+X GND B53 2000 5200 100 R 50 50 1 1 W
+X GND B54 2000 5300 100 R 50 50 1 1 W
+X GND B55 2000 5400 100 R 50 50 1 1 W
+X GND B56 2000 5500 100 R 50 50 1 1 W
+X GND B57 2000 5600 100 R 50 50 1 1 W
+X GND B58 2000 5700 100 R 50 50 1 1 W
+X GND B59 2000 5800 100 R 50 50 1 1 W
+X GND B60 2000 5900 100 R 50 50 1 1 W
+X GND B61 2000 6000 100 R 50 50 1 1 W
+X GND B62 2000 6100 100 R 50 50 1 1 W
+X GND B63 2000 6200 100 R 50 50 1 1 W
+X GND B64 2000 6300 100 R 50 50 1 1 W
+X GND B65 2000 6400 100 R 50 50 1 1 W
+X GND B66 2000 6500 100 R 50 50 1 1 W
+X SAI5_RXD0 C1 4000 0 100 R 50 50 1 1 I
+X SAI5_RXD1 C2 4000 100 100 R 50 50 1 1 I
+X SAI5_RXD2 C3 4000 200 100 R 50 50 1 1 I
+X SAI5_RXD3 C4 4000 300 100 R 50 50 1 1 I
+X SAI5_RXC C5 4000 400 100 R 50 50 1 1 I
+X SAI5_MCLK C6 4000 500 100 R 50 50 1 1 O
+X SAI5_RXFS C7 4000 600 100 R 50 50 1 1 I
+X SAI3_RXC C8 4000 700 100 R 50 50 1 1 I
+X SAI3_RXFS C9 4000 800 100 R 50 50 1 1 I
+X SAI3_RXD C10 4000 900 100 R 50 50 1 1 I
+X SAI3_TXD C11 4000 1000 100 R 50 50 1 1 O
+X SAI3_TXFS C12 4000 1100 100 R 50 50 1 1 O
+X SAI3_TXC C13 4000 1200 100 R 50 50 1 1 O
+X SAI3_MCLK C14 4000 1300 100 R 50 50 1 1 O
+X USB1_ID C15 4000 1400 100 R 50 50 1 1 I
+X USB1_VBUS C16 4000 1500 100 R 50 50 1 1 I
+X GPIO1_IO12 C17 4000 1600 100 R 50 50 1 1 B
+X GPIO1_IO13 C18 4000 1700 100 R 50 50 1 1 B
+X NC C19 4000 1800 100 R 50 50 1 1 W
+X SAI2_RXC C20 4000 1900 100 R 50 50 1 1 I
+X SAI2_RXFS C21 4000 2000 100 R 50 50 1 1 I
+X SAI2_RXD0 C22 4000 2100 100 R 50 50 1 1 I
+X SAI2_TXD0 C23 4000 2200 100 R 50 50 1 1 O
+X SAI2_TXFS C24 4000 2300 100 R 50 50 1 1 O
+X SAI2_TXC C25 4000 2400 100 R 50 50 1 1 O
+X SAI2_MCLK C26 4000 2500 100 R 50 50 1 1 O
+X USB2_ID C27 4000 2600 100 R 50 50 1 1 I
+X USB2_VBUS C28 4000 2700 100 R 50 50 1 1 I
+X GPIO1_IO14 C29 4000 2800 100 R 50 50 1 1 B
+X GPIO1_IO15 C30 4000 2900 100 R 50 50 1 1 B
+X HDMI_DDC_SDA C31 4000 3000 100 R 50 50 1 1 B
+X HDMI_DDC_SCL C32 4000 3100 100 R 50 50 1 1 O
+X HDMI_CEC C33 4000 3200 100 R 50 50 1 1 B
+X HDMI_HPD C34 4000 3300 100 R 50 50 1 1 I
+X UART3_TXD C35 4000 3400 100 R 50 50 1 1 O
+X UART3_RXD C36 4000 3500 100 R 50 50 1 1 I
+X NC C37 4000 3600 100 R 50 50 1 1 W
+X NC C38 4000 3700 100 R 50 50 1 1 W
+X UART1_RXD C39 4000 3800 100 R 50 50 1 1 I
+X UART1_TXD C40 4000 3900 100 R 50 50 1 1 O
+X GPIO1_IO08 C41 4000 4000 100 R 50 50 1 1 B
+X GPIO1_IO09 C42 4000 4100 100 R 50 50 1 1 B
+X GPIO1_IO10 C43 4000 4200 100 R 50 50 1 1 B
+X GPIO1_IO11 C44 4000 4300 100 R 50 50 1 1 B
+X I2C1_SCL C45 4000 4400 100 R 50 50 1 1 O
+X I2C1_SDA C46 4000 4500 100 R 50 50 1 1 B
+X NC C47 4000 4600 100 R 50 50 1 1 W
+X NC C48 4000 4700 100 R 50 50 1 1 W
+X SAI1_MCLK C49 4000 4800 100 R 50 50 1 1 O
+X SAI1_TXD7/BOOT_CFG[15] C50 4000 4900 100 R 50 50 1 1 O
+X SAI1_TXD6/BOOT_CFG[14] C51 4000 5000 100 R 50 50 1 1 O
+X SAI1_TXD5/BOOT_CFG[13] C52 4000 5100 100 R 50 50 1 1 O
+X SAI1_TXD4/BOOT_CFG[12] C53 4000 5200 100 R 50 50 1 1 O
+X SAI1_TXD3/BOOT_CFG[11] C54 4000 5300 100 R 50 50 1 1 O
+X SAI1_TXD2/BOOT_CFG[10] C55 4000 5400 100 R 50 50 1 1 O
+X SAI1_TXD1/BOOT_CFG[9] C56 4000 5500 100 R 50 50 1 1 O
+X SAI1_TXD0/BOOT_CFG[8] C57 4000 5600 100 R 50 50 1 1 O
+X SAI1_TXC C58 4000 5700 100 R 50 50 1 1 O
+X SAI1_TXFS C59 4000 5800 100 R 50 50 1 1 O
+X SAI1_RXD7/BOOT_CFG[7] C60 4000 5900 100 R 50 50 1 1 I
+X SAI1_RXD6/BOOT_CFG[6] C61 4000 6000 100 R 50 50 1 1 I
+X SAI1_RXD5/BOOT_CFG[5] C62 4000 6100 100 R 50 50 1 1 I
+X SAI1_RXD4/BOOT_CFG[4] C63 4000 6200 100 R 50 50 1 1 I
+X SAI1_RXD3/BOOT_CFG[3] C64 4000 6300 100 R 50 50 1 1 I
+X SAI1_RXD2/BOOT_CFG[2] C65 4000 6400 100 R 50 50 1 1 I
+X SAI1_RXD1/BOOT_CFG[1] C66 4000 6500 100 R 50 50 1 1 I
+X SAI1_RXD0/BOOT_CFG[0] C67 4000 6600 100 R 50 50 1 1 I
+X SAI1_RXC C68 4000 6700 100 R 50 50 1 1 I
+X SAI1_RXFS C69 4000 6800 100 R 50 50 1 1 I
+X NC C70 4000 6900 100 R 50 50 1 1 W
+X ECSPI1_MOSI C71 4000 7000 100 R 50 50 1 1 O
+X ECSPI1_MISO C72 4000 7100 100 R 50 50 1 1 I
+X ECSPI1_SS0 C73 4000 7200 100 R 50 50 1 1 O
+X ECSPI1_SCLK C74 4000 7300 100 R 50 50 1 1 O
+X ECSPI2_MOSI C75 4000 7400 100 R 50 50 1 1 O
+X ECSPI2_MISO C76 4000 7500 100 R 50 50 1 1 I
+X ECSPI2_SS0 C77 4000 7600 100 R 50 50 1 1 O
+X ECSPI2_SCLK C78 4000 7700 100 R 50 50 1 1 O
+X GPIO1_IO01 C79 4000 7800 100 R 50 50 1 1 B
+X GPIO1_IO03/WIFI_SELECT C80 4000 7900 100 R 50 50 1 1 B
+X GPIO1_IO04/SD2_VSELECT C81 4000 8000 100 R 50 50 1 1 B
+X GPIO1_IO06 C82 4000 8100 100 R 50 50 1 1 B
+X NAND_DATA00 C83 4000 8200 100 R 50 50 1 1 B
+X NAND_DATA01 C84 4000 8300 100 R 50 50 1 1 B
+X NAND_DATA02 C85 4000 8400 100 R 50 50 1 1 B
+X NAND_DATA03 C86 4000 8500 100 R 50 50 1 1 B
+X NAND_DATA04 C87 4000 8600 100 R 50 50 1 1 B
+X NAND_DATA05 C88 4000 8700 100 R 50 50 1 1 B
+X NAND_DATA06 C89 4000 8800 100 R 50 50 1 1 B
+X NAND_DATA07 C90 4000 8900 100 R 50 50 1 1 B
+X NAND_RE_B C91 4000 9000 100 R 50 50 1 1 B
+X NAND_READY_B C92 4000 9100 100 R 50 50 1 1 B
+X NAND_CE0_B C93 4000 9200 100 R 50 50 1 1 B
+X NAND_CE1_B C94 4000 9300 100 R 50 50 1 1 B
+X NAND_WE_B C95 4000 9400 100 R 50 50 1 1 B
+X NAND_WP_B C96 4000 9500 100 R 50 50 1 1 B
+X NAND_CE3_B C97 4000 9600 100 R 50 50 1 1 B
+X NAND_CLE C98 4000 9700 100 R 50 50 1 1 B
+X NAND_DQS C99 4000 9800 100 R 50 50 1 1 B
+X NAND_CE2_B C100 4000 9900 100 R 50 50 1 1 B
+X NAND_ALE C101 4000 10000 100 R 50 50 1 1 B
+X SPDIF_EXT_CLK C102 4000 10100 100 R 50 50 1 1 O
+X SPDIF_TX C103 4000 10200 100 R 50 50 1 1 O
+X SPDIF_RX C104 4000 10300 100 R 50 50 1 1 I
+X GND D1 6000 0 100 R 50 50 1 1 W
+X GND D2 6000 100 100 R 50 50 1 1 W
+X GND D3 6000 200 100 R 50 50 1 1 W
+X GND D4 6000 300 100 R 50 50 1 1 W
+X GND D5 6000 400 100 R 50 50 1 1 W
+X GND D6 6000 500 100 R 50 50 1 1 W
+X GND D7 6000 600 100 R 50 50 1 1 W
+X GND D8 6000 700 100 R 50 50 1 1 W
+X GND D9 6000 800 100 R 50 50 1 1 W
+X GND D10 6000 900 100 R 50 50 1 1 W
+X GND D11 6000 1000 100 R 50 50 1 1 W
+X GND D12 6000 1100 100 R 50 50 1 1 W
+X GND D13 6000 1200 100 R 50 50 1 1 W
+X GND D14 6000 1300 100 R 50 50 1 1 W
+X GND D15 6000 1400 100 R 50 50 1 1 W
+X GND D16 6000 1500 100 R 50 50 1 1 W
+X GND D17 6000 1600 100 R 50 50 1 1 W
+X GND D18 6000 1700 100 R 50 50 1 1 W
+X GND D19 6000 1800 100 R 50 50 1 1 W
+X GND D20 6000 1900 100 R 50 50 1 1 W
+X GND D21 6000 2000 100 R 50 50 1 1 W
+X GND D22 6000 2100 100 R 50 50 1 1 W
+X GND D23 6000 2200 100 R 50 50 1 1 W
+X GND D24 6000 2300 100 R 50 50 1 1 W
+X GND D25 6000 2400 100 R 50 50 1 1 W
+X GND D26 6000 2500 100 R 50 50 1 1 W
+X GND D27 6000 2600 100 R 50 50 1 1 W
+X GND D28 6000 2700 100 R 50 50 1 1 W
+X GND D29 6000 2800 100 R 50 50 1 1 W
+X GND D30 6000 2900 100 R 50 50 1 1 W
+X GND D31 6000 3000 100 R 50 50 1 1 W
+X GND D32 6000 3100 100 R 50 50 1 1 W
+X GND D33 6000 3200 100 R 50 50 1 1 W
+X GND D34 6000 3300 100 R 50 50 1 1 W
+X GND D35 6000 3400 100 R 50 50 1 1 W
+X GND D36 6000 3500 100 R 50 50 1 1 W
+X GND D37 6000 3600 100 R 50 50 1 1 W
+X GND D38 6000 3700 100 R 50 50 1 1 W
+X GND D39 6000 3800 100 R 50 50 1 1 W
+X GND D40 6000 3900 100 R 50 50 1 1 W
+X GND D41 6000 4000 100 R 50 50 1 1 W
+X GND D42 6000 4100 100 R 50 50 1 1 W
+X GND D43 6000 4200 100 R 50 50 1 1 W
+X GND D44 6000 4300 100 R 50 50 1 1 W
+X GND D45 6000 4400 100 R 50 50 1 1 W
+X GND D46 6000 4500 100 R 50 50 1 1 W
+X GND D47 6000 4600 100 R 50 50 1 1 W
+X GND D48 6000 4700 100 R 50 50 1 1 W
+X GND D49 6000 4800 100 R 50 50 1 1 W
+X GND D50 6000 4900 100 R 50 50 1 1 W
+X GND D51 6000 5000 100 R 50 50 1 1 W
+X GND D52 6000 5100 100 R 50 50 1 1 W
+X UART4_RXD E1 8000 0 100 R 50 50 1 1 I
+X UART4_TXD E2 8000 100 100 R 50 50 1 1 O
+X UART2_RXD E3 8000 200 100 R 50 50 1 1 I
+X UART2_TXD E4 8000 300 100 R 50 50 1 1 O
+X NC E5 8000 400 100 R 50 50 1 1 W
+X NC E6 8000 500 100 R 50 50 1 1 W
+X VDDA_PHY_3V3 E7 8000 600 100 R 50 50 1 1 N
+X VDDA_1V8 E8 8000 700 100 R 50 50 1 1 N
+X VDD_VPU_0V9 E9 8000 800 100 R 50 50 1 1 N
+X NC E10 8000 900 100 R 50 50 1 1 N
+X VDD_ARM_0V9 E11 8000 1000 100 R 50 50 1 1 N
+X VDD_SNVS_0V9 E12 8000 1100 100 R 50 50 1 1 N
+X NVCC_DRAM_1V1 E13 8000 1200 100 R 50 50 1 1 N
+X VDD_PHY_1V8 E14 8000 1300 100 R 50 50 1 1 N
+X VDD_PHY_0V9 E15 8000 1400 100 R 50 50 1 1 N
+X VDD_SOC_0V9 E16 8000 1500 100 R 50 50 1 1 N
+X VDD_DRAM_0V9 E17 8000 1600 100 R 50 50 1 1 N
+X VDD_GPU_0V9 E18 8000 1700 100 R 50 50 1 1 N
+X VBAT E19 8000 1800 100 R 50 50 1 1 W
+X VBAT E20 8000 1900 100 R 50 50 1 1 W
+X ENET0_RGMII_RXD2 E21 8000 2000 100 R 50 50 1 1 I
+X ENET0_RGMII_RXD3 E22 8000 2100 100 R 50 50 1 1 I
+X ENET0_RGMII_RXD0 E23 8000 2200 100 R 50 50 1 1 I
+X ENET0_RGMII_RXD1 E24 8000 2300 100 R 50 50 1 1 I
+X ENET0_RGMII_RX_CTL E25 8000 2400 100 R 50 50 1 1 I
+X ENET0_RGMII_RXC E26 8000 2500 100 R 50 50 1 1 I
+X ENET0_RGMII_TXD2 E27 8000 2600 100 R 50 50 1 1 O
+X ENET0_RGMII_TXD3 E28 8000 2700 100 R 50 50 1 1 O
+X ENET0_RGMII_TXD0 E29 8000 2800 100 R 50 50 1 1 O
+X ENET0_RGMII_TXD1 E30 8000 2900 100 R 50 50 1 1 O
+X ENET0_RGMII_TX_CTL E31 8000 3000 100 R 50 50 1 1 O
+X ENET0_RGMII_TXC E32 8000 3100 100 R 50 50 1 1 O
+X ENET0_MDC E33 8000 3200 100 R 50 50 1 1 O
+X ENET0_MDIO E34 8000 3300 100 R 50 50 1 1 B
+X VDD_ETH_1V0 E35 8000 3400 100 R 50 50 1 1 N
+X VCC_ENET_2V5 E36 8000 3500 100 R 50 50 1 1 N
+X GND F1 10000 0 100 R 50 50 1 1 W
+X GND F2 10000 100 100 R 50 50 1 1 W
+X GND F3 10000 200 100 R 50 50 1 1 W
+X GND F4 10000 300 100 R 50 50 1 1 W
+X GND F5 10000 400 100 R 50 50 1 1 W
+X GND F6 10000 500 100 R 50 50 1 1 W
+X GND F7 10000 600 100 R 50 50 1 1 W
+X GND F8 10000 700 100 R 50 50 1 1 W
+X GND F9 10000 800 100 R 50 50 1 1 W
+X GND F10 10000 900 100 R 50 50 1 1 W
+X GND F11 10000 1000 100 R 50 50 1 1 W
+X GND F12 10000 1100 100 R 50 50 1 1 W
+X GND F13 10000 1200 100 R 50 50 1 1 W
+X GND F14 10000 1300 100 R 50 50 1 1 W
+X GND F15 10000 1400 100 R 50 50 1 1 W
+X GND F16 10000 1500 100 R 50 50 1 1 W
+X GND F17 10000 1600 100 R 50 50 1 1 W
+X GND F18 10000 1700 100 R 50 50 1 1 W
